149
STR-DA4300ES
D_VIDEO BOARD IC3610 MB91F467RA-07A43GUI-X100 (VIDEO SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
VSS GND
-
Ground terminal
2 to 5
NO USE
-
Not used
6
STOP IN
I
AC off detection signal input terminal
7
DAC CLK SEL
O
Clock on/off control signal output terminal for D/A converter
8
EDID SEL0
O
I2C line selection signal output terminal for EEPROM
9, 10
NO USE
-
Not used
11, 12
VCC3 +3.3V
-
Power supply terminal (+3.3V)
13
VSS GND
-
Ground terminal
14
C_1
-
Not used
15
YAMAHA
FLASH CE
O
Not used
16
NO USE
-
Not used
17
EXT_ROM CE
O
Not used
18
YAMAHA CE
O
Chip enable signal output to the OSD controller
19
SRAM CE
O
Chip enable signal output to the S-RAM
20
NO USE
-
Not used
21
YAMAHA_RESET
O
Reset signal output to the flash memory and OSD controller "L": reset
22
YAMAHA
_WAIT_N
I
Wait signal input from the OSD controller
23
YAMAHA_
READY_N
I
Not used
24
NO USE
-
Not used
25
RDX
O
Read enable signal output to the S-RAM and OSD controller
26
SRAM LB/WE
O
Lower-byte control signal and write enable signal output to the S-RAM
27
SRAM UB/WE
O
Upper-byte control signal and write enable signal output to the S-RAM, and write enable signal
output to the OSD controller
28, 29
NO USE
-
Not used
30
TX_RST
O
Reset signal output to the HDMI transceiver "L": reset
31
TX_5VPWR
O
Power on/off control signal output terminal for the HDMI ASSIGNABLE (INPUT ONLY) OUT
jack "H": power on
32
VDAC_RESET
O
Reset signal output to the D/A converter "L": reset
33, 34
NO USE
-
Not used
35
RX_RST
O
Reset signal output to the HDMI receiver "L": reset
36
VCC3 +3.3V
-
Power supply terminal (+3.3V)
37
C_2
-
Not used
38
VSS GND
-
Ground terminal
39
X0
I
System clock input terminal (4 MHz)
40
X1
O
System clock output terminal (4 MHz)
41
VSS GND
-
Ground terminal
42
X0A
I
System clock input terminal Not used
43
X1A
O
System clock output terminal Not used
44
VCC3 +3.3V
-
Power supply terminal (+3.3V)
45
VSS GND
-
Ground terminal
46 to 53
SRAM IO0 to
SRAM IO7
I/O
Two-way data bus with the S-RAM