Sony SPP-M920 Primary, Руководство по обслуживанию

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2.2.4 RX Synthesizer
The PLL and prescaler for both the TX and RX sides are now combined into one IC. The Synthesizer receives channel information
from the embedded microprocessor in the AMD ASIC via the serial buss. It also requires a stable 18.25MHz reference which is also
supplied from the AMD ASIC.
A passive loop filter is employed to connect the synthesizer to the VCO. This tuning voltage may be observed at the ATE test point
connector. The loop filter cutoff frequency is set to about 1 kHz to allow relatively fast power-up times.
2.2.5 IF Amplifier Stage
There is only one stage of discrete IF amplification. Transistor Q5 is used as an amplifier with 330 input and output impedance . The
rest of the IF gain is provided by the FM demod IC discussed below.
2.2.6 IF filtering
The choice of 10.7MHz as an IF frequency, allows the use of relatively inexpensive filters. Two ceramic filters are used to achieve the
desired adjacent channel suppression. Two different bandwidth filters are used, 230kHz and 150kHz, so that any shifting in the
passband does not narrow the bandwidth excessively.
2.2.7 Demodulator, Data comparator, Mute comparator
This RF section uses a MC13156 FSK demodulator. It incorporates all three of the above functions into a single IC.
The Quadrature voltage may be observed form test point [TBD]. This voltage should nominally be 1.2V when a signal is center
tuned.
The data stream which comes out of the demodulator has a peak to peak amplitude of approx. 0.5V. In order to be of use it is first
filtered and converted to a digital (0 to 5V) signal by using a comparator inside the IC.
2.3 Transmit Section
2.3.1 TX Amp
There is one transistor which provide the necessary gain for the transmit section. Transistor [TBD] amplifies the signal from the TX
VCO. The output power is set to the required –5dBm (this is the power level at the BFA coneector required to guarantee less then
50mV/meter radiated field strength measured at 3meters).
2.3.2 TX VCO
The basic operation of the TX VCO is the same as the RX VCO, except for one detail. The TX VCO is also FSK modulated by the
transmit data through a second varactor in the tank (25kHz peak to peak). The data is first filterd and then the amplitude is adjusted
through [TBD] to set the deviation of the data modulation.
2.3.3 TX Synthesizer / PLL
The TX PLL is combined into one IC with the RX PLL. See above. The loop filter cutoff frequency is about 100Hz. This allows the
data modulation to include frequencies down to about 100Hz. The power-up time of the TX PLL is not critical.
BASEBAND SECTION
3.0 General Description
The AMD ASIC is a custom designed IC based on the core platform of the AMD CT2 baseband chipset. This custom modification contracted
by SONY removes the protocol blocks associated with the CT2 TDD architecture and replaces it with a SONY proprietary FDD protocol
block.
The AMD ASIC performs virtually all the non-RF functions with the exception of the line interface block on the base unit and the LCD driver
function on the handset. The base unit and handset ASIC's are identical with the exception of the ROM code which will be masked into the
ASIC prior to mass production.
3.1 Detailed Functional Description
The principle components are :
3.1.1
Protocol Functions
The protocol block conducts a signaling and a voice channel in the transmit and receive directions. All data I/O are CMOS levels.
3.1.2 Audio Functions
1) CODEC. The CODEC transcodes analog voice signals and 32kbps ADPCM data.
2) Audio Front End. The audio front end connects the analog voice I/O pins to the CODEC.
3) Tone Ringer. The tone ringer produces digital square-wave ringing tone signals for output on the RING pin.
4) Biasing. The biasing circuits establish precision currents and voltage references to support audio and battery detection analog operations.
5) DTMF Generator. The DTMF generator produces digitally-generated tones for DTMF dialing and call progress tones.