Sony SLV-GA30, Руководство по обслуживанию

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SECTION 5
INTERF
A
CE,
IC PIN FUNCTION DESCRIPTION
SL
V
-GA30/GA50/GA66/GA70K/GA77K/GF80/GF90K/GF99K/P66/PH99
5-1
5-1. SYSTEM CONTROL — VIDEO BLOCK INTERFACE (MA-336 BOARD IC201)
*1 Synchronized with drum rotation. 25 Hz (PAL), 30 Hz (NTSC) 50% duty cycle.
*2 Normally “L“. “H“ when CTL signal is not generated.
*3 V period “H“ pulse.
*4 Selected by REC mode. “H“ in LP mode.“
*5 Composite sync signal (positive).
Signal
RF SWP
QVD
C SYNC
NT JUDGE
Pin No.
@¢
@¶
%¢
!•
I/O
O
O
I
O
STOP
FF/REW
*1
L
*4
L
TAPE
THREADING
*1
L
*5
L
TAPE
UNTHREADING
*1
L
*5
L
PB
*1
*2
*5
L
PB PAUSE
*1
*3
*5
L
SLOW
*1
*3
*5
L
CUE
*1
*3
*5
L
x 2
*1
*2
*5
L
REVIEW
*1
*3
*5
L
REC
*1
L
*5
L
REC PAUSE
*1
L
*5
L
5-2. SYSTEM CONTROL — SERVO PERIPHERAL CIRCUIT INTERFACE (MA-336 BOARD IC201)
*1. 25 Hz (PAL), 30 Hz (NTSC) pulse.
*2. Pulse at tape running.
*3. Reverse logic pulse of STEP PLS.
*4. “L” when drum rotation stops.
*5. Unstable period pulse.
*6. Pulse in period in proportional to tape speed.
*7. 300 Hz (PAL), 360 Hz (NTSC) pulse.
*8. Pulse at tape running.
*9. Approx. 2 msec period “H” or “L” pulse.
*10. Approx. 1.5 msec period “H” or “L” pulse.
*11. “L” when FWD SLOW, “H” when RVS SLOW.
Signal
CTL (+)
CTL (–)
DRM PG
DRM FG
CAP FG
CAP VS
DRM VS
Pin No.
#¡
#™
#ª
#•
$º
@∞
@§
I/O
O
I
I
I
I
O
O
STOP
Hi-Z
H
*4
*4
H/L
*8
*10
FF
Hi-Z
*6
*1
*7
*6
*8
*10
REW
Hi-Z
*6
*1
*7
*6
*8
*10
TAPE
THREADING
Hi-Z
*5
*5
*5
*8
*10
TAPE
UNTHREADING
Hi-Z
*5
*5
*5
*8
*10
PB
Hi-Z
*1
*1
*7
*6
*9
*10
PB PAUSE
Hi-Z
H/L
*1
*7
H/L
*8
*10
SLOW
Hi-Z
*2
*1
*7
*2
*8
*10
CUE
Hi-Z
*6
*1
*7
*6
*9
*10
x 2
Hi-Z
*6
*1
*7
*6
*8
*10
REVIEW
Hi-Z
*6
*1
*7
*6
*9
*10
REC
*1
*1
*1
*7
*6
*9
*10
REC PAUSE
Hi-Z
H
*1
*7
H/L
*8
*10