Sony SA-WSLF10, Руководство по обслуживанию

Страница: 41 / 62

41
SA-WSLF10/SS-CSL10/TSL10/TSL11
MAIN BOARD IC526
µ
PD703033BYGF-M68-3BA-A (SYSTEM CONTROLLER)
Pin No. Pin Name I/O Description
1 DAMP_DATA O Serial data output to the HCD-LF10
2 2PIN -
Not used
3 DIR/ADC_2 O
Selection signal output terminal
4 DIAT_DO
O Serial data output to the RF modulator
5 DIAT_CLK
O Serial data transfer clock signal output to the RF modulator
6 DSP_DO
I Serial data input from the audio DSP
7 DIG_DI O
Serial data output to the digital audio interface receiver and audio DSP
8 DIG_CLK O Serial data transfer clock signal output to the digital audio interface receiver and audio DSP
9 EVDD -
Power supply terminal (+5V)
10 EVSS -
Ground terminal
11 P_PWM O Voltage control signal output to the switching regulator
12 DSP_RESET
O Reset signal output to the audio DSP "L": reset
13 DSP_PM
O PLL initialize signal output to the audio DSP
14 DSP_CS O Chip select signal output to the audio DSP
15 DSP_HACN I
Acknowledge signal input from the audio DSP
16 DSP_BST O
Boot strap signal output to the audio DSP
17 DSP_GP9 I Read ready signal input from the system controller
18
DIR_ZERO
I
Audio serial data input from the digital audio interface receiver
19 DIR_ERR I
PLL lock error and data error flag input from the digital audio interface receiver
20 DIR_CE O Chip enable signal output to the digital audio interface receiver
21 VPP -
Not used
22 DIR_XSTAT I
Source clock switching monitor input from the digital audio interface receiver
23 DIR_ANADIG O Selection signal output terminal
24 DIR-XMODE O
Reset signal output to the digital audio interface receiver "L": reset
25 DIR_DO I
Serial data input from the digital audio interface receiver
26 DAMP_RST O Reset signal output to the stream processor "L": reset
27 DAMP_SKIP_PP -
Not used
28 DAMP_MUTS O
Soft muting on/off control signal output to the stream processor "H": muting on
29 DAMP_CS1 O Chip select signal output to the stream processor (for front L-ch and R-ch)
30 DAMP_CS2 O
Chip select signal output terminal Not used
31 DAMP_CS3 O
Chip select signal output to the stream processor (for center and sub woofer)
32 DAC_CS O
Chip select signal output terminal Not used
33 AD_RST O
Reset signal output terminal Not used
34 RESET I
System reset signal input from the HCD-LF10 "L": reset
For several hundreds msec. after the power supply rises, "L" is input, then it changes to "H"
35 XT1 I Sub system clock input terminal Not used
36 XT2 O
Sub system clock output terminal Not used
37 REGO -
Not used
38 X2 O
Main system clock output terminal (20 MHz)
39 X1 I
Main system clock input terminal (20 MHz)
40 VSS -
Ground terminal
41 VDD -
Power supply terminal (+5V)
42 CLKOUT O Clock signal output terminal Not used
43 DRIVE_RST O
Reset signal output to the power driver "L": reset
44 DIP_OCP I
Protect signal input from the power driver
45 NO_USE - Not used