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50
RCD-W7V
Description
Pin Name
Pin No.
I/O
• IC406 HS602002 (CPLD) (BD BOARD (5/5))
1
16:09
O
Not used
2
N.C
I/O
Not used
3
MPEG_RST
O
Reset signal output to ZIVA_4.1
4
GND
—
Ground
5
N.C
—
Not Used
6
LEVEL_SEL
O
FLD audio level meter L/R select signal output
7
MPEG_CS
O
Latch signal output to ZIVA_4.1
8
DSP_CS
O
Chip select signal to DSP
9
TDI
I
Not used
10
TMS
I
Not used
11
TCK
I
Not used
12
PP_CS
O
Chip select signal to DOWNLOAD jig
13
CLOSE_SW
I
DVD MD tray close signal input
14
OPEN_SW
I
DVD MD tray open signal input
15
VCC
—
Power supply (+5V)
16
SENS
I
Servo DSP Internal status monitoring
17
GND
—
Ground
18
MPEG_ERROR
I
Error detection signal input from ZIVA_4.1
19
D_DAC_CS
I
Chip select signal input
20
N.C
—
Not used
21
WR
O
Write enable signal output to DOWNLOAD jig
22
MICOM_WAIT
O
Requests the insertion of wait states into the bus cycle when the external address space
is accessed
23
N.C
—
Not used
24
TDO
O
Not used
25
GND
—
Ground
26
VCC
—
Power supply (+5V)
27
RF_LAT
O
Latch signal output to SSI33P3721
28
A21
I/O
Memory address access
29
A20
I/O
Memory address access
30
A19
I/O
Memory address access
31
MPEG_WAIT
I
Transfer not complete
32
LIMIT_SW
I
Current limiter signal of DVD stepping motor
33
M_RESET
I
Reset signal input
34
EXP_W2
I/O
Expander clock signal
35
VCC
—
Power supply (+5V)
36
VCC
—
Power supply (+5V)
37
MPEG_ERROR
I
Error signal input from ZIVA_4.1
38
SENS_MICOM
I
MICOM internal bus monitoring signal input
39
D00
I/O
Memory data accessed
40
D01
I/O
Memory data accessed
41
D02
I/O
Memory data accessed
42
D03
I/O
Memory data accessed
43
D04
I/O
Memory data accessed
44
IOCS1
I
I/O port enable signal input