MEX-DV150UE/DV1500U/DV1505U
43
MAIN BOARD IC503 R5F3640DDZ98FB (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
FSW_IN
I
Oscillation frequency count signal input from the DC/DC converter
2
SIRCS_IN
I
SIRCS signal input from the remote control receiver
3
LCD_SO
O
Data output to the liquid crystal display driver
4
LCD_CE
O
Chip enable signal output to the liquid crystal display driver
5
LCD_CKO
O
Clock signal output to the liquid crystal display driver
6
BYTE
-
Connected with the ground (
fi
xed at "L")
7
FLASH_W
I
Input terminal for the
fl
ash writing "L": normally operation mode, "H": writing mode
8
XCIN
I
Low-speed system clock input terminal (32.768 kHz)
9
XCOUT
O
Low-speed system clock output terminal (32.768 kHz)
10
RESET
I
System reset signal input from the reset signal generator and reset switch "L": reset
11
XOUT
O
High-speed system clock output terminal (6 MHz)
12
VSS
-
Ground terminal
13
XIN
I
High-speed system clock input terminal (6 MHz)
14
VCC
-
Power supply terminal (+3.3V)
15
NMI
I
Non-maskable interrupt signal input terminal Fixed at "H" in this set
16
NC
-
Not used
17
DAVN
I
RDS data block synchronizing detection signal input from the RDS decoder
(DV150UE/DV1500U: AEP, UK models only)
18
TUNATTIN
I
Attenuation request signal input from the tuner unit
19
TUNATT
O
Tuner muting on/off control signal output to the tuner unit "L": muting on
20
EECKO
O
EEPROM clock signal output to the tuner unit
21
NC
-
Not used
22
EESIO
I/O
EEPROM data bus with the tuner unit
23
NSMASK
O
Tuner noise mask control signal output terminal
DC output compulsory "L" for noise detection circuit
(DV150UE/DV1500U: AEP, UK models only)
24
NC
-
Not used
25
STB
O
Power supply on/off control signal output terminal for RDS section "H": power on
(DV150UE/DV1500U: AEP, UK models only)
Standby signal output to the power ampli
fi
er "L": standby, "H": power ampli
fi
er on
26
BEEP
O
Beep sound output to the power ampli
fi
er
27
I2CCKO
O
I2C clock signal output to the RDS decoder, audio processor, power ampli
fi
er and tuner unit
28
I2CSIO
I/O
I2C data bus with the RDS decoder, audio processor, power ampli
fi
er and tuner unit
29, 30
F_TX, F_RX
I/O
Connected with the
fl
ash writing connector
31, 32
NC (L), NC (BUSY)
-
Not used
33
SA_DATA
O
Spectrum analyzer data output to the audio processor
34
SA_CLK
O
Spectrum analyzer clock signal output to the audio processor
35
DIAG
I
Diagnostic signal input from the power ampli
fi
er
36
NC
-
Not used
37
(CLK_OUT)
-
Not used
38
NC
-
Not used
39
HOLD
I
External data bus terminal Fixed at "L" in this set
40, 41
NC
-
Not used
42
PARKING
I
Side brake (parking brake) position detection signal input terminal "L": brake on
43
ACCIN
I
Accessory power detection signal input terminal "L": accessory power on
44
WRI/WR
I
External data bus terminal Fixed at "H" in this set
45
MSTR_TX
O
Serial data output to the DVD processor
46
MSTR_RX
I
Serial data input from the DVD processor
47
NC
-
Not used
48
M_RST
I
Data communication permission signal input from the DVD processor
49
ATT
O
System muting control signal output terminal "H": muting on
50
VMUTE_F
O
Front video muting on/off control signal output to the video ampli
fi
er "L": muting on
51
A_MUTE
O
Analog muting on/off control signal input from the DVD processor "H": muting on
52
Z_MUTE
O
Muting on/off control signal input from the D/A converter "H": muting on
53
SELFSW
I
Self loading position detection switch input terminal
54
INSW
I
Disc insert detection switch input terminal