6-2. BLOCK DIAGRAMS
– BD SECTION –
– 45 –
– 46 –
MDS-PC1
HR901
OVER WRITE
HEAD
HEAD
DRIVE
Q181,182
11
14
15
17
3
9
18
2
1
18
Q180
FILTER
PCO
FILI
FILO
CLTV
PLL
EFM,
ACIRC,
ENCODER/
DECODER
RF AGC & EQ
AGCI
RFO
MORFI
MORFO
RF AMP
1
2
BPF
P-P
AT
AMP
BPF
VC
VC
ANALOG
MUX
27
16
17
18
SERIAL
PARALLEL
DECODER
VICONV
20
25
22 23
4
5
6
7
8
9
IV AMP
IV AMP
E-F
BALANCE
14
15
3
VCC
VC
D101
12
11
10
LASER ON
SW
Q101
PD
APC
Q162,163
HF
MODULE
HF MODULE
SW
IC103,Q102-104
TRAKING
COIL
FOCUS
COIL
10
12
DRIVER
21
DRIVER
23
27
DRIVER
25
6
8
DRIVER
16
TFDR
PSB
XRST
SLED/SPINDLE MOTOR DRIVE
FOCUS/TRACKING COIL DRIVE
IC152
09
M
M
M902
SLED MOTOR
M901
SPINDLE MOTOR
DETECTOR
F
I
J
C
D
B
A
E
VC
LD
PD
ILCC
15
14
ATRAC
ENCODER/
DECODER
SAMPLING
RATE
CONVERTER
DTRF
CKRF
XLRF
FOCNT
79
82
81
80
93
94
95
10
SPRD
SPFD
FG IN
XRST
SPINDLE
SERVO
ADIP
DEMODULATOR/
DECODER
78
ADFG
A/D
CONVERTER
APC
SERVO
DSP
PWM
GENERATOR
DIGITAL
AUDIO
I/F
22
24
23
21
SUBCODE
PROCESSOR
11
12
MONITOR
CONTROL
4
3
2
1
3
CPU
I/F
AUTO
SEQUENCER
16
25
26
7
5
6
8
9
1
5
512FS
M
M903
LOADING MOTOR
BCK
LRCK
BUFFER
IC123
DRAM
IC124
SQSY
DQSY
MNT3
MNT2
MNT1
MNT0
SENS
SRDT
SCLK
SWDT
XLAT
DIN
ADDT
DADT
DOUT
91
92
85
86
89
88
83
13
RECP
APCREF
FFDR
FRDR
TFDR
TRDR
SFDR
SRDR
FOCNT
XLAT
SCLK
SWDT
CSLED
SE
TE
26
28
32
30
ADFG
ADIN
ADFM
29
31
34
65
67
74
73
EE
VC
TE
SE
33
66
36
37
35
63
62
64
AUX
BOTM
PEAK
ABCD
FE
AUX1
BOTM
PEAK
ABCD
38
RF
55
RFI
58
59
60
61
ABCD
AMP
FOCUS
ERROR
AMP
I
J
A
B
C
D
E
F
VC
CVB
TEMP
AMP
TEMPR
TEMPI
APC
APCREF
EQADJ
3TADJ
WBLADJ
TRACKING
ERROR
AMP
OPTICAL PICK-UP BLOCK
(KMS-260A/J1N)
48 47 46 40
RF AMP
IC101
EFMO
TX
XINIT
CLOCK
GENERATOR
85
86
89
88
92
91
94
93
SPFD
SPRD
SFDR
SRDR
TRDR
FRDR
FFDR
OVER WRITE HEAD DRIVE
IC181
OSCI
XBCK
LRCK
VC
VC
PEAK
&
BOTTOM
TRK–
TRK+
FSC+
FSC–
SLED+
SLED–
SPDL+
SPDL–
DIGITAL SERVO SIGNAL PROCESSOR, DIGITAL SIGNAL PROCESSOR
EFM/ACIRC ENCODER/DECODER, SHOCK-PROOF MEMORY CONTROLLER,
ATRAC ENCODER/DECODER, 2M-BIT DRAM
IC121
IC122
4
2
1
SCTX
XINT
DIN
ADDT
DADT
DOUT
SQSY
DQSY
MNT3
MNT2
MNT1
MNT0
SENS
SRDT
SCLK
SWDT
XLAT
LDON
WRPWR
MOD
6
5
SDA
SDA
SCL
SCL
LIMIT
REFLECT
PROTECT
CHACK IN
PACK OUT
PB P
REC P
EEP ROM
IC171
LOAD-IN
LOAD-OUT
XRST
MAIN
SECTION
DETECT SW
S681 - 683,
S685 - 688
100
47 • 46 • 48 • 49
32 29 • 34 38 • 43
D0
D3
A0
A9
45
44
3
4
17
16
1
2
18
19
6
9
11
15
5
XWE
XRAS
XCAS
XOE
DQ1
DQ4
•
•
•
•
A0
A9
42
41
20
XWE
XRAS
XCAS
XOE
•
SHOCK
RESISTANT
MEMORY
CONTROLLER
• SIGNAL PATH
: PB
: REC
:PB(Digital out)
:REC(Digital in)
Содержание MDS-PC1
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Страница 56: ... 69 70 MDS PC1 6 13 SCHEMATIC DIAGRAM PANEL SECTION See page 50 for Waveforms Page 64 Page 62 Page 65 ...