Due to the complexity of this board, performing component level fi eld repairs is not
recommended. If service is required, complete board replacement is the preferred repair method.
Data is provided for reference only.
UD BOARD SCHEMATIC DIAGRAM
1
|
2 |
3
|
4
|
5
|
6
|
7
|
8
|
9
|
10
|
11
|
12
|
13
|
14
|
A
—
B
—
C
—
D
—
E
—
F
—
G
—
H
—
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
1
2
3
4
5
6
7
8
EMI
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
9
1
0
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
2
1
2
2
2
3
2
4
C7001
C7002
C7007
C7017
C7021
C7024
C7025
FB7001
FB
70
0
3
TP7001
TP7002
TP7003
TP7004
C7078
C7079
IC7001
D7001
R7021
R7026
R7029
C7016
C7015
C7014
C7013
C7010
C7069
C7068
C7067
C7066
C7065
C7019
C7020
C7018
C7028
C7022
C7023
C7030
C7032
D7004
D7003
D7002
X7001
R7036
R7066
R7126
C7080
D7006
FL7001
R7071
R7108
R7109
R7025
R7106
R7
1
13
R
71
1
2
R7
11
1
IC7004
CN7001
IC7007
IC7008
IC7009
16V
15pF
:CHIP
15pF
:CHIP
25V
:CHIP
16V
16V
25V
:CHIP
BR24C02F-WE2
DAN202K
10k
10k
1k
:RN-CP
0.01
:CHIP
0.01
:CHIP
0.01
:CHIP
0.01
:CHIP
0.01
:CHIP
0.01
:CHIP
0.01
:CHIP
0.01
:CHIP
0.01
:CHIP
0.01
:CHIP
47p
:CHIP
47p
:CHIP
47p
:CHIP
25V :CHIP
1000p
:CH-CHIP
100pF
:CH-CHIP
UDZSTE-175.6B
UDZSTE-175.6B
UDZSTE-175.6B
14.31818MHz
3.3k:CHIP
1.2k
:CHIP
0
UDZSTE-175.6B
NFM2012P13C224RT
33
:CHIP
47
47
10k
10k
0
0
0
GM7030
DVI-DECODER
24P
DVI MOLEX CONN
SD-74320-004
PACDN006
PROTECT
PACDN006
PROTECT
PACDN006
PROTECT
5V
5V
3.3V
2.5V
3.3V
3.3V
5V
5V
3.3V
A
V
D
D
_
3
3
R
E
X
T
A
G
N
D
V
D
D
_
2
5
G
N
D
A
G
N
D
R
X
2
+
R
X
2
-
A
V
D
D
_
3
3
V
D
D
_
2
5
G
N
D
A
V
D
D
_
3
3
A
G
N
D
R
X
1
+
R
X
1
-
A
V
D
D
_
3
3
V
D
D
_
2
5
G
N
D
A
G
N
D
R
X
0
+
R
X
0
-
R
X
C
+
R
X
C
-
A
V
D
D
_
3
3
A
G
N
D
A
G
N
D
A
V
D
D
_
2
5
V
B
U
F
C
C
L
K
O
U
T
IORB
AVDDAC_33
IOGB
AVDCAC_33
IOBB
AVDDAC_33
RSET
COMP
VREF
GNDA
GNDA
BLANK
HS_OUT
VS_OUT
A
V
D
A
D
C
_
2
5
G
N
D
A
A
V
D
A
D
C
_
2
5
G
N
D
A
GNDA
GNDA
ADC_TEST
AVDADC_33
GNDA
BLUG_IN
BLU_IN
AVDADC_33
GNDA
REDG_N
RED_N
AVDADC_33
HS_IN
VS_IN
TCLK
AVDD_RPLL_33
AVSS_RPLL
AVDD_DPLL_33
AVSS_DPLL
VDD_33
GND
CVSS
CVDD_25
SCL
SDA
RESETN
IRQ
DVI_SCL
DVI_SDA
H
F
S
C
V
D
D
_
2
5
C
V
S
S
CVDD_25
VDD_33
GND
GNDA
GRNG_N
GRN_N
AVDADC_33
R
X
C
-
R
X
C
+
R
X
O
+
R
X
O
-
H
P
D
R
X
1
+
R
X
1
-
5
V
S
D
A
S
C
L
R
X
2
+
R
X
2
-
V
S
S
V
C
C
S
C
K
S
I
A
0
A
1
A
2
W
P
IOR/Y
IOG/PB
IOB/PR
XTAL OUT
+5V
+3.3V
+2.5V
+3.3V
+5V