
– 38 –
KP-43HT20/53HS20/53HS30/61HS20/61HS30
RM-Y908
RM-Y908
RM-Y908
RM-Y908
RM-Y908
18
7
26
27
28
49
47
50
48
44
9
12
36
32
33
34
11
6
46
60
61
62
59
55
8
39
17
16
15
4
IC1606
PJED-CPU
OR
OB
OG
O YS
I EXLC
38
OXLC
I EXODD
RESET
I OSC
O OSC
VBLK
DREG SCL
O DREG SDA
I DREG SDA
O I2C RST
O DREGI RST
O DREGI MUTE
O NAM
64
WRITE PROT O RAMCLR
O NVM STOP
MAIN SCL
SEN UI
SEN LE
SEN R
SEN LO
MAIN SDA
I BINT
I VP
52
OVSHIFT
53
OHSHIFT
I HP
I DREG OVF
I DREG BSY
I DREG ACK
LEFT
UPPER
LOWER
RIGHT
S3001
SENSOR
CN3001
CN10
CN12
(X/X)
CN1601
HP
VP
1
1
7
6
5
7
6
5
1
2
3
1
2
3
7
6
5
7
6
5
1
2
3
1
2
3
3
5
7
SENSOR
LEFT
UPPER
LOWER
RIGHT
SCLCK
SDAT
X1601
12MHz
IC11
IC11
IC7
Q1603
IC5
IC10
IC10
(I/V CONV.)
A
(4/4)
S
(SENSOR)
S
(SENSOR)
S
(SENSOR)
S
(SENSOR)
RH
RV
GH
GV
BH
BV
8
7
5
4
2
1
C
TO G
BOARD
CN651
SEN U
4
SEN R
2
SEN LE
3
SEN LO
H SHIFT
V SHIFT
H CENT
DF
H SAW
REGI MUTE
HP
VP
RE YS
RE B
1
RH
RV
GH
GV
14
15
16
17
BH
BV
18
19
RE G
RE R
/BINT
CLK1
2
3
5
6
DAT1
PCLK
PDAT
RE B
RE G
RE R
BINT
SCLK
SDAT
PCLK
PDAT
7
9
10
4
2
3
1
6
7
8
10
11
13
14
15
20
1
6
7
8
10
11
13
14
15
20
1
14
15
16
17
18
19
2
3
5
6
7
9
10
SEN U
SEN R
SEN LE
SEN LO
H SHIFT
V SHIFT
H CENT
DF
H SAW
REGI MUTE
HP
VP
RE YS
RE B
RE G
RE R
BINT
SCLK
SDAT
PCLK
PDAT
SCLK
SDAT
PCLK
PDAT
RH
RV
GH
GV
BH
BV
V SHIFT
H CENT
D FOCUS
H SAW
REGI MUTE
HP IN
VP
R-YS
R-B
R-G
R-R
PCLK
PDAT
/BINT
2
1
9
BINT
SCLK
SDAT
TO A
BOARD
SYSTEM
BLOCK
9
TO A
BOARD
VIDEO
BLOCK
3
TO A
BOARD
VIDEO
BLOCK
2
FOR
CHECK
CN5 (2/2)
CN5 (2/2)
3
5-1.
BLOCK DIAGRAM (6)