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ICFCD523
•
IC Pin Function Description
MAIN BOARD IC401 uPD789406AGC-044-8BT-A (SYSTEM CONTROLLER)
Pin No.
Pin Name
I/O
Description
1
VDD1
-
Power supply terminal (+5V)
2
BIAS
O
Bias output for the liquid crystal display drive
3 to 5
VLC0 to VLC2
-
Terminal for doubler circuit capacitor connection to develop liquid crystal display drive voltage
6
VSS1
-
Ground terminal
7 to 10
COM0 to COM3
O
Common drive signal output to the liquid crystal display
11 to 26
SEG0 to SEG15
O
Segment drive signal output to the liquid crystal display
27 to 30
SEG16 to SEG19
O
Segment drive signal output terminal Not used
31
NC
-
Not used
32
B MUT
O
Buzzer sound muting on/off control signal output terminal Not used
33
C RST
O
System reset signal output to the RF amplifier and digital signal processor "L": reset
34
KS4
O
Key strobe signal output to the key matrix Not used
35 to 38
KS0 to KS3
O
Key strobe signal output to the key matrix
39
AVDD
-
Power supply terminal (+5V) (for A/D converter)
40
AVREF
-
Reference voltage (+5V) terminal (for A/D converter)
41
VERSION0
I
Destination setting terminal "L": US and Canadian models, "H": AEP model
42
VERSION1
I
Destination setting terminal Fixed at "L" in this set
43
CLOSE SW
I
Disc tray close detection switch input terminal "H": disc tray is closed
44
OPEN SW
I
Disc tray open detection switch input terminal "H": disc tray is opened
45
C SENS2
I
Internal status signal (sense signal) input from the RF amplifier
46
C SENS1
I
Internal status signal (sense signal) input from the digital signal processor
47
C SQSO
I
Subcode Q data (80 bit serial) input from the digital signal processor
48
AVSS
-
Ground terminal (for A/D converter)
49
SCOR
I
Subcode sync (S0+S1) detection signal input from the digital signal processor
50
C MUT
O
Digital muting on/off control signal output to the digital signal processor "H": muting on
51
C SQCK
O
Subcode Q data (80 bit serial) reading clock signal output to the digital signal processor
52
AC IN
I
Power failure detection input terminal "L": power failure, "H": power on
53
BUZZER
O
Buzzer sound drive signal output terminal
54
C CLK
O
Serial data transfer clock signal output to the digital signal processor
55
C LAT
O
Serial data latch pulse signal output to the digital signal processor
56
C DATA
O
Serial data output to the digital signal processor
57
M MUT
O
Muting on/off control signal output terminal Not used
58
AMUT
I/O
At initial mode: Setting terminal for the test mode (CD manual mode) "L" CD manual mode
At normal mode: Audio muting on/off control signal output terminal "L": muting on
59
CD ON
I/O
At initial mode: Setting terminal for the test mode (CD auto mode) "L": CD auto mode
At normal mode: Power on/off control signal output for the CD +5V power supply
"L": CD power on
60
RADIO ON
O
Power on/off control signal output for the radio +5V power supply "L": radio power on
61
R DATA
O
PLL serial data output to the FM/AM PLL
62
R CLK
O
PLL serial data transfer clock signal output to the FM/AM PLL
63
R LAT
O
PLL serial data latch pulse signal output to the FM/AM PLL
64
POWER ON
O
Front side speaker on/off control signal output to the power amplifier "H": speaker on
65
SHIFT0
O
Shift clock output terminal of the main system clock (4.19 MHz) Not used
66
SHIFT1
O
Shift clock output terminal of the main system clock (4.19 MHz) Not used
67
RESET
I
System reset signal input from the reset signal generator "L": reset
For several hundreds msec. after the power supply rises, "L" is input, then it changes to "H"
68
X2
O
Main system clock output terminal (4.19 MHz)
69
X1
I
Main system clock input terminal (4.19 MHz)
Ver. 1.1
Содержание ICF-CD523 - CD Clock Radio
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