Sony ICD-SX700D - Digital Voice Recorder, Руководство по обслуживанию

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ICD-SX700/SX700D/SX800/SX800D/SX900
38
Pin No. Pin Name I/O Description
P23 LCD_PXCLK O Pixel clock (Not used (Open))
P24 ID — Not used (Open)
P25 I/O_A — Power supply to I/OA
P26 I/O_A — Power supply to I/OA
R1 SDR_DATA0 I/O Read/write data
R2 SDR_DQM3 O Write data mask (Not used (Open))
R3 SDR_DQM2 O Write data mask (Not used (Open))
R4 SDR_DQM1 O Write data mask
R5 SDR_WEZ O Write enable signal (Low active)
R8 SDR_DATA1 I/O Read/write data
R9 GND — GND
R10 MWI_SI I Data input (Not used (Open))
R17 U70_CTSZ I connection/On destination/On device data send/receive ready (Low active) (Not used (Open))
R18 U70_RTSZ O Data send/receive ready (Low active) (Not used (Open))
R19 GND — GND
R22 LCD_R2 O R data (Not used (Open))
R23 LCD_R4 O R data (Not used (Open))
R24 GNDSINK — GND
R25 VDD_L0 — Power supply to the logic block 0
R26 NC — Not used (Open)
T1 SDR_CKE0 O Clock enable signal
T2 SDR_CSZ1 O Chip select signal (Low active) (Not used (Open))
T3 SDR_CSZ0 O Chip select signal (Low active)
T4 SDR_BA1 O Bank address
T5 SDR_RASZ O RAS signal (Low active)
T8 SDR_CKE1 O Clock enable signal (Not used (Open))
T9 GND — GND
T10 MWI_SO O Data output (Not used (Open))
T17 U70_SOUT O Serial data output
T18 U70_SRIN I Serial data input
T19 GND — GND
T22 LCD_R5 O R data (Not used (Open))
T23 NC — Not used (Open)
T24 C_TMS I CPU debugger connection/On terminal
T25 VLOG O REGLOG power output terminal (1.86V)
T26 CKO O Crystal connection/On terminal
U1 SDR_A12 O SDR address output
U2 SDR_A11 O SDR address output
U3 SDR_A10 O SDR address output
U4 SDR_A9 O SDR address output
U5 SDR_A8 O SDR address output
U8 SDR_CASZ O CAS signal (Low active)
U9 GND — GND
U10 MWI_CS0 O Chip select 0 (Not used (Open))
U11 MWI_SK O Clock output (Not used (Open))
U12 GI/O_P1 I/O General purpose input/output terminal 1 (Not used (Open))
U13 GI/O_P0 I/O General purpose input/output terminal 0 (Not used (Open))
U14 L0_DET I Voltage monitor/reset of logic 0 block (Not used (Open))
U15 L1_DET I Voltage monitor of logic 1 block
U16 ERR_RST_REQZ O Not used (Open)
U17 CK32KI I Reference clock input 32.768 kHz (Not used (Open))
U18 REFCLKO O Reference clock output
U19 D_TCK O Input/output and interrupt input to general purpose I/O
U22 C_TDO O CPU debugger connection/On terminal
U23 VLOGIN I REGLOG power input terminal
U24 C_TCK I CPU debugger connection/On terminal