Sony HCD-SV2D, Руководство по обслуживанию

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HCD-SV2D
Pin No. Pin Name I/O Description
1 ADI O Motor Drive AMP signal output
2 ADO I Motor Drive KFG signal input
3 JV I ADJV signal input
4 PREC I Reference signal input from the RF AMP
5 RF PH I RF peak signal input from the RF AMP
6 RF BH I Bottom signal input from the RF AMP
7 TE I Tracking error signal input from the RF AMP
8 FE I Focus error signal input from the RF AMP
9 TEST0 — Ground terminal
10 EFNINP I DVD (RF) signal input from the RF AMP
11 TEST1 — Ground terminal
12 EFNINN I DVD (RF) signal input from the RF AMP
13 SLCLPFO O SLC signal output
14 SLCLPFI I SLC signal input
15 SLCO1 I SLC signal input
16 SLCO2 I SLC signal input
17 ADVV1 — Power supply terminal (+3.3V)
18 AVSS — Ground terminal
19 BHC I RF bottom signal input from the RF AMP
20 WO I WO signal input from the RF AMP
21 TEC I Tracking error signal input from the RF AMP
22 VREF O Motor Drive AMP signal output
23 TSTD1 I Pick up signal input
24 TSTD0 I Pick up signal input
25 FO O FO control signal output to the RF AMP
26 BST O BST control signal output to the RF AMP
27 TBAL I CP signal input from the RF AMP
28 FBAL O FE balance control signal output to the RF AMP
29 SGC O Servo gain control signal output to the RF AMP
30 SLCO O Motor Drive AMP signal output
31 SPDO O Motor Drive AMP signal output
32 TDO O Motor Drive AMP signal output
33 FDO O Motor Drive AMP signal output
34 DVDDO — Power supply terminal (+3.3V)
35 DVSS — Ground terminal
36 FG(PPI) O SPD FG signal output to the video DAC encoder
37 HIR0B O INT DET signal output to the video DAC encoder
38 HWAITB O RDY signal output to the video DAC encoder
39 HRESB O LSI RST signal output to the video DAC encoder
40 HRDB O RD signal output to the video DAC encoder
41 HWRB O WR signal output to the video DAC encoder
42 HCSB O SCD VD signal output to the video DAC encoder
43 HDATO O BEO1 signal output to the video DAC encoder
44 DVDD1 — Power supply terminal (+3.3V)
45 DVSS — Ground terminal
46 to 52 HDAT1 to 7 I/O Flash memory data bus
53 to 59 HADR0 to 6 O Flash memory address bus
60 MWEB O S-RAM write enable signal output
MPEG BOARD U707 LC78663N (AV DECODER)
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