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67
HCD-NXM4D
• IC Pin Function Descriptions
• IC207 ZIVA5X-C2F (DVD SYSTEM PROCESSOR) (DMB07 BOARD)
Pin No.
Pin Name
I/O
Description
1
VDDP
—
Power supply terminal (+3.3V) (I/O signal)
2
HA1
I/O
Address bus
3 to 11
HD15 to HD7
I/O
Data bus (address signal multiplexed)
12
VDDP
—
Power supply terminal (+3.3V) (I/O signal)
13
GNDP
—
Ground terminal (I/O signal)
14 to 19
HD6 to HD1
I/O
Data bus (address signal multiplexed)
20
VDDP
—
Power supply terminal (+3.3V) (I/O signal)
21
GNDP
—
Ground terminal (I/O signal)
22
HD0
I/O
Data bus (address signal multiplexed)
23
HDTACK
I/O
Acknowledge signal input/output for host data transfer (not used)
24
HIRQ0
I
Interrupt signal input for Medusa (not used)
25
WEH.UDS
I/O
Host upper data strobe signal output (not used)
26
WEL.LDS
I/O
Host lower data strobe signal output (not used)
27
HREAD
I/O
Read/write strobe signal output (not used)
28
GPIO0
I/O
Jig detection port (pull-up)
29
GND
—
Ground terminal (inside core)
30
VDD
—
Power supply terminal (+1.8V) (inside core)
31
GND25
—
Ground terminal (SDRAM I/O signal)
32
VDD25
—
Power supply terminal (+3.3V) (SDRAM I/O signal)
33 to 42
MA9 to MA0
O
SDRAM address bus
43
GND25
—
Ground terminal (SDRAM I/O signal)
44
VDD25
—
Power supply terminal (+3.3V) (SDRAM I/O signal)
45, 46
MA10,MA11
O
SDRAM address bus
47
BA1
O
SDRAM bank select 1 signal output
48
BA0
O
SDRAM bank select 0 signal output
49
MCS0
O
SDRAM chip select 0 signal output
50
MCS1
O
Not used
51
MRAS
O
SDRAM row address strobe signal output
52
MCAS
O
SDRAM column address strobe signal output
53
MWE
O
SDRAM write enable signal output (“H” : read, “L” : write)
—
Ground terminal (SDRAM I/O signal)
—
Power supply terminal (+3.3V) (SDRAM I/O signal)
O
SDRAM Clock output
I/O
SDRAM data
—
Ground terminal (SDRAM I/O signal)
O
Byte read /write mask signal 0 output
—
Power supply terminal (+3.3V) (SDRAM I/O signal)
I/O
SDRAM data
—
Ground terminal (SDRAM I/O signal)
73
MDQM1
O
Byte read /write mask signal 1 output
74
VDD25
—
Power supply terminal (+3.3V) (SDRAM I/O signal)
75 to 78
MD12 to MD15
I/O
SDRAM data
79
GND
—
Ground terminal (inside core)
80
VDD
—
Power supply terminal (+1.8V) (inside core)
81 to 84
MD16 to MD19
I/O
SDRAM data
85
GND25
—
Ground terminal (SDRAM I/O signal)
86
MDQM2
O
Byte read /write mask signal 2 output
87
VDD25
—
Power supply terminal (+3.3V) (SDRAM I/O signal)
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