Sony HCD-GTX88, Руководство по обслуживанию, Страница: 70 / 104

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HCD-GTX88
• IC PIN DESCRIPTIONS
IC101 TC94A70FG-008 (S, D) (RF AMP, FOCUS/TRACKING ERROR AMP, DIGITAL SIGNAL PROCESSOR, DIGITAL SERVO
PROCESSOR, DIGITAL FILTER, D/A CONVERTER) (BD91 BOARD)
Pin No. Pin Name I/O Pin Description
1 AVSS3 — Ground pin
2 RFZi I RF ripple zero crossing signal input
3 RFRP O RF ripple signal output
4 SBAD/RFDC O
Sub beam addition signal or RF peak detection signal output
Not used in this set. (Open)
5 FEi O Focus error signal output Not used in this set. (Open)
6 TEi O Tracking error signal output
7 TEZi I Tracking error zero crossing signal input
8 AVDD3 — Power supply pin (+3.3 V)
9 FOo O Focus coil drive signal output
10 TRo O Tracking coil drive signal output
11 VREF I Reference voltage (+1.65 V) input
12 FMO O Sled motor drive signal output
13 DMO O Spindle motor drive signal output
14 VSSP3 — Ground pin
15 VCOi I VCO control voltage input
16 VDDP3 — Power supply pin (+3.3 V)
17 VDD1 — Power supply pin (+1.5 V)
18 VSS1 — Ground pin
19 FGiN I FG signal input Not used. (Connected to ground.)
20 IO0 (/HSO) I Disc inner position detection signal input
21 IO1 (/UHSO) O Not used in this set. (Open)
22 XVSS3 — Ground pin
23 XI I System clock input (16.9344 MHz)
24 XO O System clock output (16.9344 MHz)
25 XVDD3 — Power supply pin (+3.3 V)
26 DVSS3 — Ground pin
27 RO O Analog audio (R-ch) signal output
28 DVDD3 — Power supply pin (+3.3 V)
29 DVR O Reference voltage (+1.65 V) output
30 LO O Analog audio (L-ch) signal output
31 DVSS3 — Ground pin
32 VDDT3 — Power supply pin (+3.3 V)
33 VSS1 — Ground pin
34 VDD1 — Power supply pin (+1.5 V)
35 VDDM1 — Power supply pin (+1.5 V)
36 SRAMSTB I S-RAM standby mode control signal input Fixed at “L” in this set.
37 RST I Reset signal input from the system controller “L”: reset
38, 39 BUS0, BUS1 I/O Serial data input/output from the system controller or USB controller
40 BUS2 (SO) I/O Serial data input/output from the system controller or USB controller
41 BUS3 (SI) I/O Serial data input/output from the system controller or USB controller
42 BUCK (CLK) I Serial data transfer clock signal input from the system controller or USB controller
43 CCE I Chip enable signal input from the system controller or USB controller
44 TEST I Setting pin for test mode Normally fixed at “L”
45 IRQ I Interrupt request signal input
46 AoUT3 (PO4) O Request signal output to the USB controller Not used in this set. (Open)
47 AoUT2 (PO5) O Audio data output to the USB controller
48 PIO0 O Request signal output to the system controller or USB controller
49 PIO1 O ST REQ signal output
50 PIO2 O Not used in this set. (Open)