59
HCD-GNX660
Pin No.
Pin Name
I/O
Description
• IC401 M30622MGP-A54FPU0 SYSTEM CONTROL (MAIN BOARD)
1
BD-RST
O
Reset signal output to the digital signal processor ( “L”:reset)
2
CD-DATA-OUT
O
Serial data output to the digital signal processor
3
XLAT
O
Serial data latch pulse output to the digital signal processor
4
SIRCS
I
Remote control signal input
5
MP3-DATA-OUT
O
Serial data output signal to MP3 decoder IC
6
MP3-DATA-IN
I
Serial data input signal from MP3 decoder IC
7
MP3-CLK
O
Serial data transfer clock signal to MP3 decoder IC
8
BYTE
-
Ground terminal
9
CNVSS
-
Ground terminal
10
XC-IN
I
Sub system clock input terminal (32.768kHz)
11
XC-OUT
O
Sub system clock output terminal (32.768kHz)
12
RESET
I
System reset signal input from the reset signal IC (“L”: reset) After the power supply
rises, “L” is input for several hundreds msec and then change to “H”.
13
X-OUT
O
Main system clock output terminal (5MHz)
14
VSS
-
Ground terminal
15
X-IN
I
Main system clock input terminal (5MHz)
16
VCC
-
Power supply terminal (+3.3V)
17
NMI
I
Non-maskable interrupt input terminal (Pull to +3.3V)
18
NO-USE
I
Unused port (Pull to ground)
19
SCOR
I
Subcode sync (S0+S1) detection signal input from the digital signal processor
20
AC-CUT
I
“C off detection signal input from the reset signal IC (“L”: AC cut detected)
21
SENS
I
Internal status detection monitor input from the digital signal processor
22
MP3-RST
O
Reset signal output to MP3 decoder IC
23
MP3-CS
O
Chip select output signal to MP3 decoder IC (“L”:enable)
24
MP3-LP
O
Latch output signal to MP3 decoder IC (“L”:enable)
25
MP3-ACK
I
Acknowledgement input signal from MP3 decoder IC (“L”:acknowledged)
26
MP3-REQ
I
Request signal from MP3 decoder IC
27
MP3-STB
O
Standby mode signal output to MP3 decoder IC (“L”:standby mode)
28
XTACN
O
BD DSP oscillation on/off control signal output (“H”:on)
29
IIC-CLK
I/O
Clock signal for IIC communcation between the microcomputer and the IIC checker
30
IIC-DATA
I/O
Data signal for IIC communcation between the microcomputer and the IIC checker
31
VMUTE
O
CDG video signal muting on/off control signal output (“H”: muting on)
32
CDG-DET
I
CDG disc detection signal input from CDG decoder (“H”: CDG disc detected)
33
CDG-RST
O
Reset signal output to the CDG decoder (“L”:reset)
34
CD-MUTE
O
CD analog signal muting on/off control signal output (“H”:muting on)
35
CD-POWER
O
Power on/off control signal output to BU section (“H”:power on)
36
ST-CE
O
PLL chip enable signal output to the tuner unit
37
ST-DOUT/MC-DIN
I
PLL serial data input from the tuner unit
38
ST-CLK
O
PLL serial data transfer clock signal output to the tuner unit
39
ST-DIN/MC-DOUT
O
PLL serial data output to the tuner unit
40
TUNED
I
Tuning detection signal input from the tuner unit (“L”:tuned)
41
OPEN-SW
I
Eject detection signal input from the CD mechanism deck
42
TBL-SENSE
I
Disc tray position detection signal input from the CD mechanism deck
43
E-3
I
Disc tray status detection signal input from the CD mechanism deck
44
E-2
I
Disc tray status detection signal input from the CD mechanism deck
45
E-1
I
Disc tray status detection signal input from the CD mechanism deck
46
TM-F
O
Turning motor control signal output to the CD mechanism deck
47
TM-R
O
Turning motor control signal output to the CD mechanism deck
