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80
HCD-GN90D/GN100D
Pin No.
Pin Name
I/O
Description
• IC701 TMC57929PGF-RDP (DVD DECODER)(DMB07 BOARD)
1, 2
D5, D6
I/O
Two-way data bus with CXP973064
3
VSS
—
Ground
4
D7
I/O
Two-way data bus with CXP973064
5
A0
I
Address signal input from CXP973064
6
VDD
—
Power supply (+3.3V)
7
A1
I
Address signal input from CXP973064
8
VDD5V
—
Power supply (+5V)
9 to 14
A2 to A7
I
Address signal input from CXP973064
15
VSS
—
Ground
16
XWAIT
O
Not used (open)
17
XRD
I
Read strobe signal input from CXP973064
18
XWR
I
Write strobe signal input from CXP973064
19
XCS
I
Chip select signal input from CXP973064
20, 21
XINT0, XINT1
O
Interrupt signal output to CXP973064
22
VDD
—
Power supply (+3.3V)
23
XHRS
I
Not used (open)
24
HDB7
O
SD data bus with ZIVA5X-C2F
25
VSS
—
Ground
26
HDB8
O
SD data bus with ZIVA5X-C2F
27
HDB6
O
SD data bus with ZIVA5X-C2F
28
VDDS
—
Power supply (+5V)
29
HDB9
O
Not used (open)
30
HDB5
O
SD data bus with ZIVA5X-C2F
31
HDBA
O
Not used
32
HDB4
O
SD data bus with ZIVA5X-C2F
33
VSS
—
Ground
34
HDBB
O
Not used (open)
35
HDB3
O
SD data bus with ZIVA5X-C2F
36
VDD
—
Power supply (+3.3V)
37
HDBC
O
Not used (open)
38
VDDS
—
Power supply (+5V)
39
HDB2
O
SD data bus with ZIVA5X-C2F
40
HDBD
O
Not used (open)
41
HDB1
O
SD data bus with ZIVA5X-C2F
42
VSS
—
Ground
43
HDBE
O
Not used (open)
44
HDB0
O
SD data bus with ZIVA5X-C2F
45
HDBF
O
Not used (open)
46
HDRQ
O
SD data request signal output
47
VDDS
—
Power supply (+5V)
48
XHWR
O
SD clock output
49
XSHD
O
Header flag signal
50
VDD
—
Power supply (+3.3V)
51
REDY
O
Not used (open)
52
VSS
—
Ground
53
XHAC
I
DVD mode: Serial data request signal input from ZIVA5X-C2F
54
HINT
O
Not used (Pull up)
55
XS16
O
Not used (Pull up)
56
HA1
I
Not used (Pull up)