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ICX423AL
Block Diagram and Pin Configuration
(Top view)
Horizontal Register
Output Unit
Note)
Note) : Photo sensor
GND
V
DD
SUB
RG
H
φ
1
V
e
rtical Register
HIS
V
OUT
V
φ
4
V
φ
3
V
φ
2
V
φ
1
V
L
GND
V
GG
V
SS
GND
RD
H
φ
2
V
L
7
9
10
11
12
13
14
15
16
17
18
19
20
6
5
4
3
2
1
Pin Description
Pin No. Symbol
Description
1
2
3
4
5
6
7
8
9
10
V
φ
4
V
φ
3
V
φ
2
SUB
GND
V
φ
1
V
L
NC
GND
V
DD
Signal output
Output amplifier gate bias
Output amplifier source
GND
Reset drain
Reset gate clock
Protective transistor bias
Horizontal register transfer clock
Horizontal register transfer clock
Horizontal register input source bias
Description
Pin No.
Symbol
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Substrate (overflow drain)
GND
Vertical register transfer clock
Protective transistor bias
GND
Output amplifier drain power
11
12
13
14
15
16
17
18
19
20
V
OUT
V
GG
V
SS
GND
RD
RG
V
L
H
φ
1
H
φ
2
HIS