3-1
DSLR-A900_L2
3. BLOCK DIAGRAMS
3-1. OVERALL BLOCK DIAGRAM (1/6)
( ) : Number in parenthesis ( ) indicates the division number of schematic diagram where the component is located.
A
: VIDEO SIGNAL
CLOCK
GENERATOR
(7/26)
IC2102
AA5, W5, AA6, W6, AA7, W7,
AA9, W9, AA10, W10, AA11, W11
F24, G24, E24, G25,
F25, E25, C25, B25,
F26, E26, C26, B26,
A26, F27, E27, C27
AE12, AC14, AF12, AC12,
AD14, AE13, AD15, AC13,
AF13, AC16, AE14, AF14,
AF21, AE19, AC21, AA23
39, 36, 33, 30, 27, 24, 18, 15, 12, 9, 6, 3
CN5002
CN3102
Y5, V5, Y6, V6, Y7, V7,
Y9, V9, Y10, V10, Y11, V11
B22 - B17, A15 - A10
A23 - A18, B16 - B11
38, 35, 32, 29, 26, 23, 17, 14, 11, 8, 5, 2
21
W8
20
V8
A16
A25
A17
E8
E6
E9
F9
D3
B8
B7
47
B9
45
C10
44
B10
46
C9
42
A10
49
D9
50
39, 36, 33, 30, 27, 24, 18, 15, 12, 9, 6, 3
38, 35, 32, 29, 26, 23, 17, 14, 11, 8, 5, 2
21
20
47
45
44
46
42
49
1
2
3
50
5
47
C8
CMOS_SLVDS_DP[00-11]
E1_RIF_D[00-15]
CMOS_SLVDS_DN[00-11]
CMOS_SLVDS_CLKP
E1_RIF_CLK
A27, F28, E28, C28,
B28, A28, F29, E29,
C29, B29, F30, E30,
C30, B30, E31, C31
AF17, V23, AD19, AF18,
AE17, U23, AC20, AF19,
AE18, AD20, AF20, AD21,
AE20, AD23, AF23, AC24
B32
W23
E1_JIF_D[00-15]
E1_JIF_ACK
E23
XE1_RIF_HD
F23
AF5
AF9
AC11
XE1_RIF_VD
CMOS_SLVDS_CLKN
CMOS_SI
CMOS_SO
CMOS_SCK
XCMOS_CE
D1
D3
E1
C4
B34
B33
A32
A33
STAR_SI_E1
B25
F13
XE1_RST
AE2
E13
E1_BOOT
AF11
F12
E1_SPU_EN
B1
E11
AG1
E1_CAP_START
AC8
E12
NZ_REL_EN_E1
A18
A18
AF7
IMG_SYSCLK_12M
IMG_SYSCLK_12M_E2
3
6
F3
4
G2
8
STAR_SO_E1
STAR_SCK_E1
STAR_CS_E1
IMAGE
PROCESSOR
3
(11/26 - 13/26)
IC2401
512M
SDRAM
(12/26)
IC2403
E33, E34, F31, F33,
F34, G29, G30, G31,
G33, G34, G35, H29,
H30, H31, H33, H34
AE12, AC14, AF12, AC12,
AD14, AE13, AD15, AC13,
AF13, AC16, AE14, AF14,
AF21, AE19, AC21, AA23
D35
E2_RIF_D[00-15]
E2_RIF_CLK
J34, J35, K30, K31,
K33, K34, L29, L30,
L31, L33, L34, M30,
M31, M33, M34, M35
AF17, V23, AD19, AF18,
AE17, U23, AC20, AF19,
AE18, AD20, AF20, AD21,
AE20, AD23, AF23, AC24
J33
W23
E2_JIF_D[00-15]
E2_JIF_ACK
D34
XE2_RIF_HD
D33
AF5
AF9
AC11
XE2_RIF_VD
D1
D3
E1
C4
E22
F21
G21
E21
STAR_SI_E2
B25
C10
XE2_RST
AE2
E10
E2_BOOT
AF11
F10
E2_SPU_EN
AC8
F11
NZ_REL_EN_E2
STAR_SO_E2
STAR_SCK_E2
STAR_CS_E2
XCMOS_CLR
XCMOS_HS
XCMOS_VS
X5001
54MHz
W16
CMOS
IMAGER
IC5004
CN5001
CN3101
TH5001
1
IS-030 BOARD
AM-015 BOARD (1/6)
FP-893 FLEXIBLE
BOARD
FP-894 FLEXIBLE
BOARD
10 - 13
15
16
(SHUTTER)
SHUTTER
UNIT
CONTROL
BLOCK
SHUTTER CHARGE
MOTOR
M901
MIRROR CHARGE
MOTOR
M902
M
M
T11
T10
N11
N14
T7
U7
SHUTTER CHARGE
MOTOR DRIVE
(18/26)
IC4402 , Q4412 - Q4414
MIRROR CHARGE
MOTOR DRIVE
(18/26)
IC4401
SCM+
SC_M+
CN4518
X_ON
XSHUTTER_X_SW
CN4508
1
2
5
7
CN4509
1C_MAG
SH_1C
2C_MAG
SH_2C
1ST_CURTAIN_MG
1ST_CURTAIN_MG
2ND_CURTAIN_MG
SREL(-)
SHUTTER_RELEASE_MG-
SHUTTER_RELEASE_MG
T6
SHUTTER_CHARGE_M_1
MIRROR_CHARGE_M_1
U6
18
N6
P6
P11
B14
MIRROR_CHARGE_M_2
19
6, 7
14, 15
D6
B3
A3
B2
D2
SHUTTER_CHARGE_M_2
MCM+
MC_M+
2
CN4525
MREL(-)
xMC_CAM_1
xMC_CAM_2
MIRROR_RELEASE_MG-
MCM-
MC_M-
XSC_CAM_1
XSC_CAM_2
XSC_CAM_1
XSC_CAM_2
SHUTTER
DRIVE
Q4409
SHUTTER
RELEASE
Q4411
U10
MIRROR_RELEASE_MG
MIRROR
RELEASE
ACT901
ACTUATOR
Q4410
OVERALL (6/6)
(PAGE 3-6)
4
OVERALL (4/6)
(PAGE 3-4)
2
OVERALL (3/6)
(PAGE 3-3)
3
X1001
12MHz
E2_DDR2_D[00-31]
E2_DDR2_D[00-15]
E2_DDR2_A[00-12], E2_DDR2_BA0, E2_DDR2_BA1
E2_DDR2_CLK
XCS_DDR2_E2
E2_DDR2_CKE
XE2_DDR2_CLK
E2_DDR2_CLK
XCS_DDR2_E2
E2_DDR2_CKE
XE2_DDR2_CLK
V26
W25
U24
U26
J8
K8
K2
L8
512M
SDRAM
(12/26)
IC2402
E2_DDR2_D[16-31]
J8
K8
K2
L8
1G
SDRAM
(5/26)
IC1201
NZ_DDR2_D[00-31]
NZ_DDR2_D[00-07]
NZ_DDR2A_A[00-13], NZ_DDR2A_BA[0-2]
NZ_DDR2A_CLK
NZ_DDR2A_XCS
NZ_DDR2A_CKE
NZ_DDR2A_XCLK
Y35
W33
W30
W35
E8
F8
F2
G8
NZ_DDR2A_CLK
NZ_DDR2A_XCS
NZ_DDR2A_CKE
NZ_DDR2A_XCLK
E8
F8
F2
G8
1G
SDRAM
(5/26)
IC1203
NZ_DDR2_D[08-15]
1G
SDRAM
(5/26)
IC1202
NZ_DDR2_D[16-23]
NZ_DDR2B_A[00-13], NZ_DDR2B_BA[0-2]
NZ_DDR2B_CLK
NZ_DDR2B_XCS
NZ_DDR2B_CKE
NZ_DDR2B_XCLK
AL35
AL34
AM34
AK35
E8
F8
F2
G8
NZ_DDR2B_CLK
NZ_DDR2B_XCS
NZ_DDR2B_CKE
NZ_DDR2B_XCLK
E8
F8
F2
G8
1G
SDRAM
(5/26)
IC1204
NZ_DDR2_D[24-31]
XIMG_RESET
XIMG_RESET
XIMG_RESET
XIMG_RESET
32M FLASH
(14/26)
IC2601
E2_SYS_D[00-15]
E2_SYS_A[01-22]
XCS_SYS_E2
B6
F1
B4
512M
SDRAM
(8/26)
IC2003
E1_DDR2_D[00-31]
E1_DDR2_D[00-15]
E1_DDR2_A[00-12], E1_DDR2_BA0, E1_DDR2_BA1
E1_DDR2_CLK
XCS_DDR2_E1
E1_DDR2_CKE
XE1_DDR2_CLK
E1_DDR2_CLK
XCS_DDR2_E1
E1_DDR2_CKE
XE1_DDR2_CLK
V26
W25
U24
U26
J8
K8
K2
L8
512M
SDRAM
(8/26)
IC2002
E1_DDR2_D[16-31]
J8
K8
K2
L8
32M FLASH
(10/26)
IC2201
E1_SYS_D[00-15]
E1_SYS_A[01-22]
XCS_SYS_E1
B6
N5
L2
L1
STAR_SI_AS
STAR_SO_AS
STAR_SCK_AS
STAR_CS_AS
STAR_SI_AS
STAR_SO_AS
STAR_SCK_AS
STAR_CS_AS
L3
STAR_SI_CA
M5
E_1ST_CURTAIN_START
P2
STAR_SO_CA
K2
STAR_SCK_CA
K1
XLENS_RELEASE_SW_IMG
C4
CAP_CTRL_IN
B4
STAR_CS_CA
K3
M4
B5
L1
M2
M14
M1
K6
F1
B4
CMOS_TEMP_1
DP00 - DP11
DM00 - DM11
DPCK
DMCK
SDO
SDI
SCK
XCE
XCLR
XHS
XVS
IMG_TEMP1
64M FLASH
(6/26)
IC1501
NZ_EMC_D[00-15]
NZ_EMC_A[00-22]
XNZ_EMC_CS
Y5
G1
NZ_EMC_CLK
V1
A3
XNZ_EMC_RESET
AA6
C4
AP4
XUPDATE_LED_ON
D1001
(F/W UPDATE)
XMSX_IN_CA
XCF_IN_CA
CF_TEMP
XCABLE_IN
XHDMI_HPD_IN
OVERALL (2/6)
(PAGE 3-2)
1
IMAGE
PROCESSOR
1
(1/26 - 6/26)
IC1001
(1/2)
MAIN CPU
(16/26)
IC4001
(1/5)
IMAGE
PROCESSOR
2
(7/26 - 9/26)
IC2001
(1/2)
05
M
M
XMC_CAM_1
XMC_CAM_2
XMC_CAM_1
XMC_CAM_2
CN4512
(1/2)
AFM-003
FLEXIBLE
BOARD
(1/2)
MIRROR CHARGE
CAM DETECT