Sony DSC-T5 Fall 2005, Руководство по обслуживанию

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DSC-T5_L2
3-1. OVERALL BLOCK DIAGRAM (1/2)
3-1 3-2
( ) : Number in parenthesis ( ) indicates the division number of schematic diagram where the component is located.
3. BLOCK DIAGRAMS
A : VIDEO SIGNAL
A
: AUDIO SIGNAL
A
: VIDEO/AUDIO SIGNAL
SY-134 BOARD (1/2)
XCS_FE
VSUB_CONT_PRE
VSUB_CONT_POST
F2
U22
E1
K5 G4 H4
L5 H2 H1
J1 J2 M5
J4 K4 M6
K2 K1
CLKTGO
CAMERA DSP, CPU
LENS CONTROL,
MODE CONTROL
(2/7)
J5
CA_FD
H5
CA_HD
CA_AD00 – CA_AD13
LENS
CCD
IMAGER
IC002
CD-587 FLEXIBLE BOARD
15
20
60
85
53
26
27
18
19 37
40
44
48
LENS BLOCK
CN601
ZOOM
MOTOR
M
FOCUS
MOTOR
M
FOCUS
RESET
SENSOR
ZOOM
RESET
SENSOR
2
3
5
6
20
ı
28
30
ı
32
15
LENS TEMP
SENSOR
BUFFER
Q003
10
17
6
29
19
72
76
R23
T4
11
13
Q001
Q002
1 - 5 7 - 9
11 - 14
CCD_OUT
POWER_SAVE
V1A, V1B, V2, V3A, V3B, V4,
V5A, V5B, V6, V7A, V7B, V8
H1A, H2A, H1B, H2B
VHLD
VST
9
8
RG
24
Q101
CCD SIGNAL
PROCESSOR,
TIMING
GENERATOR
(1/7)
IC101
5 6 8 9
11 12 16
79 88 90
91 102
23 82
87
SHT
CSUB
Q102
56
86
XCAM_DR_CS
P21 D4
80
77
97 98 100
101 103 104
105 3 2 4 7
10 14 18
89
93
J25
U4
V4
LENS_TMP
IRIS
(METER)
IRIS
MOTOR
M
IC201
B4
B5
B3
A3
18
ı
21
1
ı
4
5
ı
8
14
FOCUS
MOTOR
DRIVER
IRIS_A_DIR, IRIS_A_BRK,
IRIS_B_DIR, IRIS_B_BRK
FOCUS_A_DIR,
FOCUS_B_DIR,
FOCUS_EN
ZOOM_A_DIR,
ZOOM_B_DIR,
ZOOM_EN
FC_SENS
ZM_SENS
ZOOM
MOTOR
DRIVER
IRIS MOTOR
DRIVER
FOCUS_A, A, B, B
ZOOM_A, A, B, B ZOOM_A, A, B, B
IRIS_A, A, B, B IRIS_A, A, B, B
CN602
11
FOCUS_A, A, B, B
F2
E2
D2
B1
D6
E6
B7
C6 D5
A6
B6
C5
F5
E5
D3
F1
A2
C3
C4
A1
LENS DRIVE
(3/7)
10
N4
P6
P4
R2
L2
N5
L4
N6
M2
N2
ST-126 BOARD (1/2)
R4
05
V23
R22
AB22
STRB_CHG
XSTRB_FULL
ST_UNREG
Q001
FLASH
UNIT
FLASH
CONTROL,
CHARGE
CONTROL
5
7
8
6
2
IC001
XE_H
TRIGGER
TRIGGER_GND
XE_L
+
C005
CHARGING
CAPACITOR
D001
3
5 4
1
1
T001
STRB_CHG_CONT
4
STRB_ON
STRB_CHARGE
XSTRB_FULL
CN603
(1/2)
11
10
9
I_PEAK
8
STRB_ON
CN002
(1/2)
10
9
8
7 6
7
D003
SELF TIMER/
AF ILLUMINATOR
XAF_LED XAF_LED
SAN_AUOUT
XSAN_RST_OUT
XSAN_RST_OUT
2
OVERALL (2/2)
(PAGE 3-3)
USB_DP, USB_DM
AF4
K26
L26
AC1
AD1
D901
BACKLIGHT
COLOR
LCD
PANEL
U2
R6
E9
B8
BL_H
21
ı
28
CN609
CN001
LCD901
30
31
33
32
1
2
5
6
HSYNC, VSYNC
DCK
IC301
(1/2)
XCS
PANEL UNIT
SAN_AUIN
Y26
T5
XCS_AUDIO
USB_VBUS
D8 D7
E8 E7
D6 D5
E6 B4
AB6 AC4
AE4 AE5
AC5 AF6
BL_H
BL_L
OVERALL (2/2)
(PAGE 3-4)
1
OVERALL (2/2)
(PAGE 3-4)
3
BL_L
BL_H
11
CN002 (2/2)
CN603
(2/2)
BL_L
12
12
13
W25
D9
XRESET
LCD_HD, LCD_VD
LCD_CK
XCS_PANEL
XSAN_RST_OUT
ST-126 BOARD (2/2)
LCD_D0 – LCD_D7
Q301
CPU_D0 – CPU_D15 CPU_D0 – CPU_D15
XCPU_CS4
IC402
32M BURST FLASH
(4/7)
IC403
256M SDRAM
(4/7)
IC401
32M AND FLASH
(4/7)
D3 C5 E3 G4 G6 H7 H5
H2 G2 J3 G3
G5 J6 H6 H4
J4 J5 H3 J7
AB13 AA13 AE13 AF13
AF12 AE12 AA12 AC12
AC11 AB12 AE11 AF11
AE10 AB11 AC10 AB10
F7 E6 E5 G5
E4 G3 E3 G1
G7 F6 F5 F4
D5 F3 F2 E2
E8 D8 C8 B8 A8 B7 A7
C7 A2 B2 C2 A1 B1 C1
D2 D1 D4 B6 A6 C6 B3
AF21 AF20 AE20 AB18 AB19 AC19 AB16
AE19 AF19 AF18 AE18 AA15 AC18 AC17
AB15 AE17 AF17 AE16 AB14 AC16 AC15 AE14
B5
K3 AC6
XCPU_CS0
E7
SAN_27M_CLKO
B4
AE6
AF9
DSP_QCLK
J1
DSP_QCLKE
J2
A18
A17
J1
CPU_A01 – CPU_A21, CPU_A25
CPU_D0 – CPU_D15
CPU_A01 – CPU_A21 CPU_A20, A21, A25
DSP_DQ00 – DSP_DQ31, DSP_DQM0 – DSP_DQM3
DSP_AQ00 – DSP_AQ12, DSP_QBA0, DSP_QBA1
R8 N7 R9 N8 P9 M8
M7 L8 L2 M3 M2 P1
N2 R1 N3 R2 E8 D7
D8 B9 C8 A9 C7 A8
A2 C3 A1 C2 B1 D2
D3 E2 K9 K1 F8 F2
D21 D22 D20 B22 A22 A23
B23 E20 E21 B24 A24 A25
B25 C25 C26 B26 E10 A10
D10 E11 B10 A11 B11 E12
D11 D12 F12 B12 A12 E13
D13 D14 F13 B15 F14 E14
G8 G9 F7 F3 G1
G2 G3 H1 H2 J3
G7 H9 H3 J7 H8
D17 D18 D16 B18 A19
B19 E16 D19 E19 E17
B20 A20 E18 B21 A21
29
34
VCOMH
F25
LCD_ADJ1
15
35
SI, SCLK
D0 – D7
SAN1_SO, XSAN1_SCK
SAN1_SO, XSAN1_SCK
SAN1_SO, XSAN1_SCK
SAN1_SO, XSAN1_SCK
FP-298
FLEXIBLE
BOARD (1/2)
FP-298
FLEXIBLE
BOARD (2/2)
V_LINE_OUT
H26
U23
VIDEO_AMP_ON
SAN_VOUT
VIDEO AMP
(2/7)
5 3
4
IC303
BUFFER
Q305
MS_BS, MS_D0 – MS_D3, MS_CLK