DSC-T10_L3
4-6
SY-163 (1/6)
XX
R141
XX
C126
XX
C129
R9.5/P0
R9.5/P0
R:REC MODE
P:PB MODE
: Voltage measurement of the CSP ICs
and the Transistors with mark, are
not possible.
NO MARK:REC/PB MODE
0
0
R8.8/P0.3
0
R1.3
/P0
R13/P0
R12.5
/P0
R1.3/P0
R13/P0
0.1u
C124
XIC_301_1_SCK
VSUB_CONT_POST
10uH
L102
CL103
D_3.2V
CA_AD6
CL107
XIC_301_RST_OUT
VSUB_CONT_PRE
15
R111
CAM_12V
R109
4.7
0.1u
C103
4.7
R110
0.01u
C128
CA_AD0
FB103
CA_AD7
CA_AD5
RN1904AFS(TLR3SONY)
Q102
6
2
1
3
5
4
0
R119
CA_AD8
CA_AD9
0.1u
C106
CL105
CAM_-7.5V
CLKTGO
IC_301_1_SO
CA_AD10
CA_AD2
0.001u
C116
FB104
CL106
CA_AD3
CA_AD11
4.7
R107
CA_AD4
XCS_FE
CA_AD1
FB101
0.47u
C122
CA_FD
REG_GND
10uH
L104
1u
C105
0.1u
C120
1SS387CT(TL3SONY)
D101
CA_AD12
CL104
CA_HD
CA_AD13
CL108
4.7
R108
0.1u
C123
0.47u
C121
33P
CN101
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
CL109
CL110
CL114
CL113
CL112
CL111
3300
R132
UN9213J-(K8).SO
Q101
220k
R103
0
R101
0
R112
0
R122
R123
0
0
R130
CAM_2.9V
10uH
L103
47u
6.3V
C113
CL115
CL116
4.7u
C130
1M
R102
0.1u
C125
0.1u
C108
0.1u
C109
0.1u
C111
100k
R106
0.1u
C117
0
R133
1
R134
0
R135
0
R136
1
R137
R129
1k
0.1u
C119
0.1u
C127
R118
100k
1u
C132
1
Vout
2
FB
3
Vin
4
5
6
0.001u
C133
100p
C134
0.1u
C131
1800
R131
A1
A2
A3
A4
B1
B2
B3
C1
C2
C3
D3
D2
D1
E3
E2
E1
F3
F2
F1
G3
G2
G1
H3
H2
H1
J1
J2
K1
K2
K3
J3
J4
J5
J6
K4
K5
K6
J7
K7
J8
K10
K9
K8
J9
G7
H7
H6
G6
G5
H5
H4
V5A
G4
V5B
F4
V6
E4
V7A
D4
V7B
D7
V8
D6
V9(Vst)
D5
V10(Vhld)
C7
V13
C6
V15
C4
VSUB
C5
SUBSW
E7
STROBE(R/T)
F7
MSHUT(P/S)
H8
FIELD
G8
DACB
F8
DACA
J10
AVDD
H9
AVDD
H10
CCDIN
G10
CCDGND
G9
AVSS
F9
AVSS
F10
REFN
E10
REFP
E9
CM
D9
L
D10
BYPD
E8
AVDD1
D8
AVDD2
C8
AVSS1
C9
AVSS2
C10
AVSS2
B10
TPADCK
A10
TPDM
A9
TPSHP
B9
TPSHD
B8
PVSS
B7
PVCC
A8
VL
A7
VH
A6
VM
A5
VM
B6
DVDD1
B5
DVDD1
B4
DVDD1
E5
DVSS1
E6
DVSS1
F5
DVSS1
F6
GNDS1
10V
22u
C110
6.3V
47u
C115
10V
4.7u
C102
6.3V
47u
C114
CA_AD7
CA_AD1
VHLD
VST
CA_AD8
V8
CA_AD3
CA_AD0
CA_AD10
CA_AD6
CA_AD2
CA_AD12
V5B
V5A
V10
V7
CA_AD11
V6
CA_AD5
CA_AD4
CA_AD13
CA_AD9
SWITCH
SWITCH
4
E
A
C
6
12
2
K
H
9
XX MARK:NO MOUNT
14
11
7
SY-163 BOARD (1/6)
G
B
13
8
I
15
05
10
CCD SIGNAL PROCESS
D
F
1
16
5
J
3
@01
(3/6)
@02
(4/6)
(3/6)
(2/6)
@03
(5/6)
(3/6)
(2/6)
(3/6)
@04
(6/6)
CAM_-7.5V
CAM_2.9V
D_3.2V
V1
V9
V3B
V4
V2
V3A
CA_AD13
B15
DRVSS
DRVSS
DRVDD
DRVDD
GNDS2
LASTH
H2B
H1B
RG
H2A
H1A
HVDD1
HVDD2
HVDD3
HVSS1
HVSS1
HVSS2
HVSS3
V1A
V1B
V2
V3A
V3B
V4
TRIG
HR
VR
MCK
SDL
SOUT(CLPOB)
SDATA
RESET
CS
SCLK
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
VSP00M21ZWDR
IC101
CCD SIGNAL PROCESS,
IC101
TIMING GENERATOR
TK11100CSCB-G
IC102
12V REG
IC102
Vcont
GND
Np
V5A
V3B
V5B
V9
V2
V7
V1
V6
V8
VHLD
V10
V3A
VST
V4
REG_GND
REG_GND
CAM_12V_CD
V7
REG_GND
H1B
V1
V9
CAM_-7.5V_CD
V5B
H2B
RG
CCD_GND
V5A
REG_GND
V3A
V8
CSUB
V10
VST
V2
H2A
REG_GND
REG_GND
SHT
REG_GND
V6
VHLD
REG_GND
H1A
CCD_OUT
V3B
V4
CD-656
FLEXIBLE
of Level 2
LND001-LND033
Page 4-5
CA_AD8
CA_AD7
CA_AD0
CA_AD5
CA_AD2
CA_AD1
CA_AD12
CA_AD11
CA_AD10
CA_AD6
CA_AD4
CA_AD3
CA_AD9
±
0.5%
15k
R140
±
0.5%
330k
R138
±
0.5%
R139
39k