Sony DPS-V55, Руководство по обслуживанию

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MAIN BOARD IC701 MB90641APF-G-105BND (CPU)
Pin No. Pin Name I/O Function
1 to 10 A0 to A9 O
Address signal output to the static RAM (IC702) and EP-ROM (IC704)
11 VSS
— Ground terminal
12 to 16 A10 to A14 O
Address signal output to the static RAM (IC702) and EP-ROM (IC704)
17, 18 A15, A16 O
Address signal output to the EP-ROM (IC704)
19 to 22
—
O
Not used (open)
23 VCC
— Power supply terminal (+5V)
24 to 26
—
O
Not used (open)
27 C
— Connected to capacitor
28 to 31 P71 to P74 I
Key return signal input terminal “L” active
32, 33 P75, P76 O
Key scan signal output terminal “L” active
34, 35 VCC
— Power supply terminal (+5V)
36, 37 VSS
— Ground terminal
38 P60
O LED drive signal output for the INPUT LEVEL 1 LED (D801: red) “L”: LED on
39 P61 O
LED drive signal output for the INPUT LEVEL 1 LED (D801: green) “L”: LED on
40 P62 O
LED drive signal output for the INPUT LEVEL 2 LED (D802: red) “L”: LED on
41 P63
O LED drive signal output for the INPUT LEVEL 2 LED (D802: green) “L”: LED on
42 VSS
— Ground terminal
43 P64
O LED drive signal output for the INPUT LEVEL 3 LED (D803: red) “L”: LED on
44 P65
O LED drive signal output for the INPUT LEVEL 3 LED (D803: green) “L”: LED on
45 P66
O LED drive signal output for the INPUT LEVEL 4 LED (D804: red) “L”: LED on
46 P67 O
LED drive signal output for the INPUT LEVEL 4 LED (D804: green) “L”: LED on
47 P80 I
Dial pulse input from the rotary encoder (SW841) “L” active
48 P81 I
Dial pulse input from the rotary encoder (SW841) “L” active
49
MD0
I
Setting terminal for the external vector mode Fixed at “L” in this set
50 MD1 I
Setting terminal for the external vector mode Fixed at “H” in this set
51 MD2 I
Setting terminal for the external vector mode Fixed at “L” in this set
52 HSTX I
Hardware standby input terminal Fixed at “H” in this set
53 REDY I
Ready detection signal input from the DSP (IC502) “L”: busy status
54 XLAT O
Serial data latch pulse output to the DSP (IC502)
55 TRDT I
UART serial data input from the DSP (IC502)
56 RVDT O
UART serial data output to the DSP (IC502)
57 SCK O
UART serial data transfer clock signal output to the DSP (IC502)
58 MIDI IN I
Input terminal for the MIDI connection
59 MIDI OUT O
Output terminal for the MIDI connection
60 BATT CHK I
Voltage detection input for the lithium battery (BA701) “L”: no battery
61 OUTPUT MUTE O
Muting on/off selection signal output for the analog output circuit “H”: muting on
62, 63
—
O
Not used (open)
64 CS0 O
Chip select signal output to the EP-ROM (IC704) “L” active
65 CS1 O
Chip select signal output to the static RAM (IC702) “L” active
66
LCD
CONTRAST ON
O Control signal output to the liquid crystal display contrast adjustment circuit “H”: contrast on
67 ADMUTE O
Muting control signal output to the A/D converter (IC501, 551) “L”: muting on
68 ADLAT O
Serial data latch pulse output to the A/D converter (IC501, 551)
69 ADCLK O
Serial data transfer clock signal output to the A/D converter (IC501, 551)
70 ADDAT O
Serial data output to the A/D converter (IC501, 551)
71, 72
—
O
Not used (open)