—
15
—
SA
T-W
60
M E M _ C L K < 3 . . 0 >
M C 1 _ C A S _ N
M C 1 _ W E _ N
M C 1 _ C K E
M C 1 _ R A S _ N
M C 1 _ B S
MC1_CS_N<1..0>
M C 1 _ D Q M < 3 . . 0 >
MC1_DATA<31..0>
MC1_ADDR<10..0>
MEM (4)
M C 0 _ C K E
M C 0 _ C S _ N < 1 . . 0 >
M C 0 _ W E _ N
M C 0 _ C A S _ N
M C 0 _ R A S _ N
M C 0 _ D Q M < 3 . . 0 >
MC0_DATA<31..0>
M C 0 _ A D D R < 1 0 . . 0 >
M C 0 _ B S
R O M _ C E _ N < 3 . . 2 >
ROM (5)
R O M _ R E S E T _ N
R O M _ W E _ N
R O M _ O E _ N
R O M _ A D D R < 2 1 . . 0 >
ROM_DATA<15..0>
A U D _ V C C
A U D _ R F U
AUDIO (8)
A U D _ M I C _ S E L _ O U T _ N
AUD_LINEOUT_L
AUD_MIC_IN
A U D _ T U N E R _ L
A U D _ T U N E R _ R
AUD_BITCLK
AUD_INDATA
A U D _ O U T D A T A
AUD_MIC_SEL
A U D _ C C L K
A U D _ C D A T A
A U D _ L R C L K
A U D _ C L K
A U D _ C S _ N
A U D _ M U T E
AUD_EXTIN_SEL
AUD_LINEOUT_R
AUD_LINEOUT2_L
AUD_LINEOUT2_R
AUD_LINEIN_L
AUD_LINEIN_R
AUD_LINEIN2_R
AUD_LINEIN2_L
S Y S _ R E S E T _ N
A U D _ M O N O _ S W
A U D _ M O N O _ S W 2
CPU_EVALI_N
C P U _ E V A L O _ N
C P U _ E W R R D Y _ N
C P U _ C L K
P O W E R _ O K
S Y S _ R E S E T _ N
CPU_VALIDOUT_N
DIAG_INT_N
CPU_INT_N
C P U _ C R E S E T _ N
C P U _ V C C O K
C P U _ S R E S E T _ N
C P U _ W R R D Y _ N
CPU_VALIDIN_N
C P U _ R E L E A S E _ N
C P U _ E X T R Q S T _ N
CPU_AD<31..0>
C P U _ M O D E C L K
C P U _ M O D E I N
C P U _ C M D < 8 . . 0 >
CPU (3)
FUD_INT_N
V I D _ C O M P 2 _ O U T
V I D _ C O M P _ O U T
V I D _ C O M P _ R F U
VIDEO (7)
VID_C_OUT
VID_Y_OUT
V I D _ D A C _ C O M P
VID_DAC_C
VID_DAC_Y
MODEM (6)
M O D _ S M _ X M T D A T
M O D _ S M _ R E C D A T
M O D _ S M _ C L K
M O D _ S M _ B I T C L K
MOD_INT
M O D _ R E S E T
S Y S _ R E S E T _ N
M O D _ S M _ L R C L K
DAA_LSTAT
D A A _ H O O K S W _ N
DAA_RING_DET
D A A _ S N O O P _ N
SMC_FIT
S M C _ D A T A
R I O _ O E _ N
R I O _ W E _ N
S M C _ C L K
D A C _ C R C B A O U T
D A C _ Y A O U T
C P U _ E W R R D Y _ N
C P U _ E V A L O _ N
CPU_EVALI_N
C P U _ W R R D Y _ N
C P U _ V A L O U T _ N
CPU_VALIN_N
C P U _ V C C O K
GPIO<19..0>
RIO_DATA<15..0>
RIO_ADDR<21..0>
$Id: body.1.1,v 1.6 1997/05/31 14:06:45 sleat Exp $
M C 0 _ A D D R < 1 0 . . 0 >
M C 0 _ B S
M C 0 _ C K E
M C 0 _ C A S _ N
M C 0 _ C S _ N < 1 . . 0 >
MC0_DATA<31..0>
M C 0 _ D Q M < 3 . . 0 >
M C 0 _ R A S _ N
M C 0 _ W E _ N
M C 1 _ A D D R < 1 0 . . 0 >
M C 1 _ B S
M C 1 _ C A S _ N
M C 1 _ C K E
M C 1 _ C S _ N < 1 . . 0 >
MC1_DATA<31..0>
M C 1 _ D Q M < 3 . . 0 >
M C 1 _ R A S _ N
M C 1 _ W E _ N
PP_DIR
AUD_BITCLK
A U D _ C L K
A U D _ L R C L K
A U D _ S D A T A
DIV_BCLK
DIV_DATA<7..0>
DIV_HS
DIV_LLC
DIV_LRCLK
DIV_SDATA
DIV_VS
ID_DATA
IIC_CLK
IIC_DATA
IR_CLK
IR_IN
IR_OUT
MISC_LED<2..0>
MOD_BITCLK
M O D _ C L K
M O D _ L R C L K
M O D _ S D A T A
M O D _ S D A T A I N
P O T _ C L K
P P _ A C K _ N
P P _ A U T O F D _ N
P P _ B U S Y
PP_DATA<7..0>
P P _ E R R O R
P P _ F A U L T _ N
PP_INIT_N
P P _ S E L E C T
PP_SELIN_N
P P _ S T R O B E _ N
RIO_DEVIORDY
(2)
S O L O 2
RIO_CE_N<3..0>
CPU_AD<31..0>
C P U _ C M D < 8 . . 0 >
C P U _ C R E S E T _ N
CPU_INT_N
C P U _ M O D E C L K
C P U _ M O D E I N
C P U _ S R E S E T _ N
AUD_SDATAIN
S P D _ S D A T A
RIO_DINT<7..0>
RIO_DEN_N<7..0>
RIO_DRQ<1..0>
RIO_DAK_N<1..0>
D A C _ C O M P A O U T
S Y S _ 5 V R E S E T _ N
S Y S _ R E S E T _ N
S M C _ P E N _ N
S M C _ R E S E T _ N
S Y S _ P W R O K
U A R T _ C T S _ N
U A R T _ D C D _ N
U A R T _ D T R _ N
S Y S _ R S W T C H _ N
SYS_2XCLKIN
S Y S _ D P W R O K
U A R T _ R T S _ N
VID_DATA<7..0>
VID_VSYNC_N
V I D _ H S Y N C _ N
U A R T _ T X D
U A R T _ R X D
S M C _ I N S E R T _ N
VID_COMP_IN
VID_Y_IN
A U D _ M O N O _ S W 2
A U D _ M O N O _ S W
L E D _ D I S P < 0 >
IR_LED_SENSE
PIC_CLK
PIC_IR_CLK
IR_XMT
IR_REC
U A R T _ D T R _ N
U A R T _ R T S _ N
SMC_FIT
S M C _ D A T A
S M C _ R E S E T _ N
U A R T _ T X D
U A R T _ R X D
S M C _ I N S E R T _ N
S M C _ P W R E N A B _ N
U A R T _ D C D _ N
S M C _ C L K
S C _ C L K D I V < 0 >
S C _ C L K D I V < 1 >
U A R T _ C T S _ N
V I D _ C O M P 2 _ O U T
V I D _ C O M P _ O U T
VID_Y_OUT
VID_C_OUT
SVID_SENSE_N
A U D _ M I C _ S E N S E
S P D _ S D A T A
A U D _ M I C _ S E L _ O U T _ N
AUD_LINEIN2_L
AUD_LINEIN2_R
SVID_IN_SENSE_N
VID_C_IN
MISC_IO (10)
AUD_LINEIN_R
AUD_LINEIN_L
AUD_MIC_IN
AUD_LINEOUT_L
AUD_LINEOUT_R
AUD_LINEOUT2_L
A U D _ L I N E O U T 2 _ R
VID_COMP2_IN
U A R T _ C T S _ D B 9
U A R T _ R T S _ D B 9
U A R T _ R X D _ D B 9
U A R T _ T X D _ D B 9
A U D _ V C C
D R A W I N G
LAST_MODIFIED=Tue Mar 21 17:54:28 2000
C WEBTV NETWORKS, INC. 1999
representative of a named recipient.
or otherwise use this document unless you are an authorized
than the recipient is not authorized. You may not read, copy,
information. Disclosure of this information to anyone other
This document contains privileged or otherwise legally protected
APPROVED:
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6
7
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5
6
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DATE:
1
3
3 7
1
PVT
E L M E R
T O P
SLEATOR/FULLER
0.0
A U D _ V C C
A U D _ V C C
R F U _ A U D I O _ O U T
A U D _ M O N O _ S W 2
A U D _ M O N O _ S W
S Y S _ R E S E T _ N
AUD_LINEIN2_L
AUD_LINEIN2_R
AUD_LINEIN_R
AUD_LINEIN_L
A U D _ M I C _ S E L _ O U T _ N
AUD_LINEOUT_L
AUD_SDATAIN
A U D _ S D A T A
A U D _ L I N E O U T 2 _ R
AUD_LINEOUT2_L
AUD_LINEOUT_R
AUD_IN_SEL
AUD_MIC_IN
A U D _ T U N E R _ R
A U D _ T U N E R _ L
A U D _ C L K
AUD_BITCLK
A U D _ L R C L K
G P I O < 1 2 >
G P I O < 1 3 >
G P I O < 3 >
G P I O < 1 >
G P I O < 1 0 >
U A R T _ C T S _ D B 9
U A R T _ T X D _ D B 9
U A R T _ R X D _ D B 9
U A R T _ R T S _ D B 9
AUD_LINEIN2_R
CPU_EVALI_N
C P U _ E W R R D Y _ N
C P U _ E V A L O _ N
S Y S _ R E S E T _ N
C P U _ C L K
S Y S _ P W R O K
DIAG_INT_N
C P U _ W R R D Y _ N
C P U _ S R E S E T _ N
C P U _ C M D < 8 . . 0 >
C P U _ E X T R Q S T _ N
C P U _ V A L O U T _ N
C P U _ M O D E C L K
C P U _ M O D E I N
C P U _ R E L E A S E _ N
C P U _ V C C O K
CPU_VALIN_N
C P U _ C R E S E T _ N
CPU_INT_N
FUD_INT_N
CPU_AD<31..0>
AUD_LINEIN_L
AUD_LINEIN_R
SMC_FIT
S M C _ I N S E R T _ N
S M C _ D A T A
S M C _ P E N _ N
VID_VSYNC_N
V I D _ H S Y N C _ N
VID_DATA<7..0>
U A R T _ R X D
U A R T _ T X D
U A R T _ R T S _ N
U A R T _ D C D _ N
U A R T _ D T R _ N
S Y S _ R E S E T _ N
S Y S _ 5 V R E S E T _ N
S Y S _ R S W T C H _ N
S Y S _ P W R O K
S Y S _ D P W R O K
SYS_2XCLKIN
S M C _ R E S E T _ N
U A R T _ C T S _ N
RIO_DRQ<1..0>
RIO_DAK_N<1..0>
RIO_DINT<7..0>
M C 0 _ D Q M < 3 . . 0 >
M C 0 _ W E _ N
M C 0 _ R A S _ N
MC0_DATA<31..0>
M C 0 _ B S
M C 0 _ A D D R < 1 0 . . 0 >
M C 0 _ C A S _ N
M C 0 _ C S _ N < 1 . . 0 >
M C 0 _ C K E
M C 1 _ C K E
M C 1 _ C S _ N < 1 . . 0 >
M C 1 _ C A S _ N
M C 1 _ A D D R < 1 0 . . 0 >
M C 1 _ B S
MC1_DATA<31..0>
M C 1 _ R A S _ N
M C 1 _ W E _ N
M C 1 _ D Q M < 3 . . 0 >
A U D _ C L K
A U D _ L R C L K
AUD_SDATAIN
D A C _ Y A O U T
DIV_BCLK
DIV_DATA<7..0>
DIV_HS
DIV_LLC
DIV_SDATA
DIV_VS
GPIO<19..0>
ID_DATA
IIC_CLK
IIC_DATA
IR_CLK
IR_IN
IR_OUT
MISC_LED<2..0>
MOD_BITCLK
M O D _ C L K
M O D _ L R C L K
M O D _ S D A T A
M O D _ S D A T A I N
P P _ A C K _ N
P P _ A U T O F D _ N
P P _ B U S Y
PP_DATA<7..0>
PP_DIR
P P _ E R R O R
P P _ F A U L T _ N
PP_INIT_N
P P _ S E L E C T
PP_SELIN_N
P P _ S T R O B E _ N
RIO_ADDR<21..0>
RIO_CE_N<3..0>
RIO_DATA<15..0>
RIO_DEN_N<7..0>
RIO_DEVIORDY
RIO_ADDR<21..0>
RIO_DATA<15..0>
R I O _ W E _ N
RIO_CE_N<3..2>
R I O _ O E _ N
S Y S _ R E S E T _ N
C P U _ C M D < 8 . . 0 >
C P U _ C R E S E T _ N
CPU_INT_N
C P U _ M O D E C L K
C P U _ M O D E I N
C P U _ S R E S E T _ N
C P U _ V A L O U T _ N
CPU_AD<31..0>
CPU_VALIN_N
A U D _ S D A T A
S P D _ S D A T A
D A C _ C R C B A O U T
D A C _ C O M P A O U T
C P U _ W R R D Y _ N
C P U _ E V A L O _ N
R I O _ O E _ N
R I O _ W E _ N
S M C _ C L K
C P U _ V C C O K
C P U _ E W R R D Y _ N
AUD_BITCLK
DIV_LRCLK
AUD_MIC_IN
AUD_LINEOUT_R
AUD_LINEOUT_L
AUD_LINEOUT2_L
A U D _ L I N E O U T 2 _ R
M C 0 _ B S
M C 0 _ A D D R < 1 0 . . 0 >
MC0_DATA<31..0>
M C 0 _ D Q M < 3 . . 0 >
M C 0 _ R A S _ N
M C 0 _ C A S _ N
M C 0 _ W E _ N
M C 0 _ C S _ N < 1 . . 0 >
M C 0 _ C K E
M C 1 _ A D D R < 1 0 . . 0 >
M C 1 _ B S
MC1_DATA<31..0>
M C 1 _ R A S _ N
M C 1 _ D Q M < 3 . . 0 >
M C 1 _ C A S _ N
M C 1 _ W E _ N
M C 1 _ C S _ N < 1 . . 0 >
M C 1 _ C K E
M E M _ C L K < 3 . . 0 >
VID_Y_IN
VID_C_IN
G P I O < 2 >
VID_COMP_IN
VID_COMP2_IN
AUD_LINEIN2_L
VID_Y_OUT
VID_C_OUT
D A C _ C O M P A O U T
D A C _ C R C B A O U T
D A C _ Y A O U T
V I D _ C O M P _ R F U
V I D _ C O M P 2 _ O U T
V I D _ C O M P _ O U T
G P I O < 1 4 >
G P I O < 4 >
G P I O < 5 >
G P I O < 6 >
M O D _ L R C L K
S Y S _ 5 V R E S E T _ N
G P I O < 1 4 >
RIO_DINT<0>
M O D _ C L K
MOD_BITCLK
M O D _ S D A T A
M O D _ S D A T A I N
V I D _ C O M P _ O U T
U A R T _ C T S _ N
S M C _ C L K
IR_OUT
A U D _ C L K
M I S C _ L E D < 0 >
V I D _ C O M P 2 _ O U T
VID_Y_OUT
VID_C_OUT
G P I O < 9 >
U A R T _ D C D _ N
U A R T _ R T S _ N
U A R T _ D T R _ N
U A R T _ T X D
U A R T _ R X D
S M C _ D A T A
S M C _ R E S E T _ N
S M C _ I N S E R T _ N
SMC_FIT
F U D _ G P I O < 7 >
S M C _ P E N _ N
F U D _ G P I O < 6 >
IR_CLK
IR_IN
G P I O < 1 5 >
A U D _ M I C _ S E L _ O U T _ N
A U D _ M I C _ S E N S E
S P D _ S D A T A
A U D _ M O N O _ S W
A U D _ M O N O _ S W 2
TITLE=ELMER
A B B R E V = E L M E R
CPU_EVALI_N
VID_PIXEL_CLK
Содержание DIRECTV RECEIVER SAT-W60
Страница 52: ... 52 SAT W60 POWER SUPPLY ...
Страница 59: ...SAT W60 ...