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• MAIN BOARD IC801 MSM65354-418GS-BK4 (SYSTEM CONTROLLER, LCD DRIVER, KEY CONTROL)
Pin No.
Pin name
I/O
Description
1-4
COM1-4
O
Common drive signal output to the liquid crystal display.
5-19
SEG0-14
O
Segment drive signal output to the liquid crystal display.
20-36
NC
–
Not used (open).
37
AGND
–
Ground terminal (analog system).
38
DC IN JACK
I
DC IN 6V jack (J801) detection input terminal. “L”: plug in
39
DOOR OPEN
I
CD lid open/close detection switch (S804) input terminal The stop status is reset with the
falling edge of input signal. “H”: CD lid open, “L”: CD lid close
40
KEY IN1
I
Key input terminal (A/D input).
41
XRM KEY IN
I
Remote control key input terminal (A/D input).
42
DC CHK
I
DC in voltage detection input terminal (A/D input) Also used for DC IN detection
43
NTSC/PAL
I
Video system select switch (S803) input terminal “L”: NTSC, “H”: PAL
44
BATT CHK
I
Battery check terminal.
45
KEY IN2
I
Key input terminal (A/D input).
46
VRH
I
Reference voltage input terminal (+3.3V) (for A/D converter).
47
AVDD
–
Power supply terminal (+3.3V) (analog system).
48
DBB CTL1
O
MEGA BASS on/off control signal output to the BA3574BFS (IC361).
“L”: MEGA BASS on (level-1 and level-2)
49
AU-MUTE
O
Analog line mute control signal output terminal . “H”: mute on
____________
50
XAU-RESET
O
Reset signal output to the CXD2545Q (IC601) and D-RAM controller (IC681). “L”: reset
__________
51
XV-RESET
O
Reset signal output to the MPEG audio/video decoder (IC701) and video encoder (IC721).
“L”: reset
52
HOLD
I
HOLD switch (S802) input terminal. “L”: hold off, “H”: hold on
53
RESUME
I
RESUME switch (S801) input terminal. “L”: resume off, “H”: resume on
54
XDSPLT
O
Serial data latch pulse signal output to the CXD2545Q (IC601).
55
XDACLT
O
Serial data latch pulse signal output to the D/A converter (IC322).
56
V-POWER
O
Video CD system power supply on/off control signal output terminal. “L”: power on
57
AU-POWER
O
Audio CD system power supply on/off control signal output terminal. “L”: power on
58
ESP-POWER
O
Control signal output to the ESP (Electronic Shock Protection) circuit.
59
TRVCTL
O
Tracking gain control signal output terminal.
60
TRV3
O
61
TRV2
O
Tracking balance control signal output terminal.
62
TRV1
O
63
TRV0
O
______
64
XSOE
O
Serial data output enable signal output to the D-RAM controller (IC681).
65
DSP-SUBQ
I
Sub-code Q data signal input from the CXD2545Q (IC601).
66
DSP-SBQCLK
O
Sub-code Q data reading clock signal output to the CXD2545Q (IC601).
67
REMOTE
I
Sircs remote control signal input from the remote control receiver (IC1).
68
DSP-DATA
O
Serial data output to the CXD2545Q (IC601) and D/A converter (IC322).
69
DSP-SENS
I
Internal status (SENSE) signal input from the CXD2545Q (IC601).
70
DSP-CLK
O
Serial data transfer clock signal output to the CXD2545Q (IC601) and D/A converter (IC322).
71
DSP-SNSCLK
O
Sense serial data reading clock signal output to the CXD2545Q (IC601).
72
VDD
–
Power supply terminal (+3.3V) (digital system).
73
BEEP
O
Beep sound drive signal output terminal.
74
C2PO
O
C2PO signal control output to the D-RAM controller (IC681). “L”: stop mode, “H”: searching
75
ESP-CLK
O
Serial data transfer clock signal output to the D-RAM controller (IC681).
Содержание D-V55
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