– 18 –
Pin No.
Pin Name
I/O
Pin Description
60
BU.IN
I
Back-up power detection input
61
BUSON
I
Bus on control input
62
IN SW
I
Disc in switch input (SW1)
63
SELF SW
I
Self switch input (SW2)
64
TX CE
O
EEPROM chip enable output
65
SCK2
O
Sub Q read clock output
66
SI2
I
Sub Q 80 bit, PCM peak and level data 16 bit input
67
CD DATA
O
CD signal process serial data output
68
ESPXWRE
O
Write signal output to DRAM controller.
69
ESPXRDE
O
Read signal output to DRAM controller.
70
ESPXLT
O
Serial data latch output to DRAM controller.
71
ESPXSOE
O
XSOE signal output to DRAM controller.
72
VDD
—
Power supply
73
HIN
I
Fixed at “H” in this set.
74
TEXT.ON/OFF
I
Fixed at “H” in this set.
75
PH1
I
Not used in this set.
76
FBTBSEL
I
Not used in this set.
77
CDOSEL
I
Not used in this set.
78 – 80
—
—
Not used in this set.
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