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33
AVD-C70ES
Pin No.
Pin Name
I/O
Pin Description
167
XTAL
I
33.8688 MHz clock signal input terminal
168
VSS
—
Ground terminal (digital system)
169
XTL2
O
System clock output terminal (33.8688 MHz)
170
XTL1
I
System clock input terminal (33.8688 MHz)
171
VDD
—
Power supply terminal (+3.3 V) (digital system)
172 to 176
D0 to D4
I/O
Two-way data bus with the mechanism controller
Содержание AVD-C70ES
Страница 6: ...6 AVD C70ES SECTION 2 GENERAL This section is extracted from instruction manual LOCATION OF CONTROLS ...
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