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Software Installation

rev 2.0

SFPCI -VME SERIES User’s Guide and Installation Manual

36

5.6.5.2 VME Power Off Support: The Off-Line State

When it enters the “off-line” state, the PVME nexus tries to protect the system by 
denying direct attempts to access VME addresses on that bus. The PVME nexus driver 
tries to accomplish this by imposing 3 access control policies:

1. In the off-line state, 

open

(2), 

mmap

(2), 

read

(2), or 

write

(2) to /dev/pvme/ 

vmeXXdXX devices will fail with the error ENXIO.
2. In the off-line state, the PVME nexus driver sends a SIGKILL signal to every pro-
cess that has an open file descriptor to any portion of VME space exported by the 
PVME driver.

To illustrate, a user process that performed a direct 

open

(2) on the device file

 /dev/

pvme/vme32d32

 before the VMEbus went off-line would be killed to prevent 

potentially disasterous attempts to access that VME space. The PVME nexus driver 
manages this by saving references via

 proc_ref

(9f) to every process that calls its 

open

(2) and 

close

(2) entry points. When an “off-line” transition occurs, each of these 

references is sent a SIGKILL from PVME interrupt context via proc_signal(9f).

3. Also, when in the “off-line” state, attempts to use add_drv(1m) to load a VME 
device driver will fail, and the message

WARNING: pvme0: Target VMEbus off-line 

will be printed.

VME drivers that were already loaded at the time that power was shutdown can still be 
safely unloaded, as long as their detach or fini routines do not attempt to access VME 
memory. Generally, it is a good idea to unload VME device drivers controlling a 
powered-down VMEbus to avoid erroneous attempts to access the VME devices.

If the user subsequently restores power to the VMEbus, attempts to load VME device 
drivers with add_drv(1m) will cause the PVME to detect the power-on state. The PVME 
driver will then load the VME driver, and print the following message on the console:

NOTICE: [pvme0 VMEbus on-line]

At this point, the VMEbus should be back to normal.

5.6.6 VME Power-Off Support: Caveats

The power-on/power-off support for the VMEbus provided by PVME is not foolproof. 
If there are VME device drivers loaded underneath the PVME nexus driver, the 
possibility exists to panic the system if the VMEbus is powered-off.

5.6.6.1 VME leaf driver mappings

Attempts to access powered-down VME devices via a VME driver loaded before the 
power went off will fail, and could cause the machine to panic with a bus timeout error. 
The reason is that file descriptors that may be open to the user’s VME device driver are 
unknown to the PVME nexus driver. These file descriptors provide a “backdoor” to the 

Содержание SFPCI -VME SERIES

Страница 1: ...al and Installation Guide rev 2 0 SFPCI VME SERIES User s Manual and Installation Guide Solflower Computer Inc 3511 Thomas Road Ste 2 Santa Clara CA 95054 408 982 8680 Fax 408 982 8685 http www solflower com olflower Computer Inc ...

Страница 2: ...nterference in which case the user at his own expense will be required to take whatever measures may be required to correct the interference This document presents information for users of Solflower Computer Inc s SFPCI VME Series of PCI to VME adapters Although the information contained within this document is considered accurate and characteristic of the subject product Solflower Computer Inc re...

Страница 3: ...arently migrate their present VMEbus subsystem to a PCI Based SPARC platform 1 2 APPLICABLE DOCUMENTS PCI Specification Revision 2 1 VMEbus Specification Manual Revision D IEEE STD 1014 9187 1 3 GENERAL DESCRIPTION The SFPCI VME series is a PCI to VMEbus adapter allowing master and slave accesses between these two host busses In addition VMEbus masters and slaves may carry out information transfer...

Страница 4: ...ton and the packing material for future use in case the product must be reshipped or returned to Solflower The basic components of the SFPCI VME are shipped in one box containing the following 1 PCI short card SF_PCI 2 VME 6U card SF_VME 3 100 pin flat shielded cable 4 Solaris 2 x device driver for SFPCI VME 5 User manual and installation guide 6 6U VME enclosure optional Caution Since electrostat...

Страница 5: ...1 Interface Card Jumpers Select The SFPCI VME Series boards are shipped wiht standard settings at the factory as described below Users may wish to alter any or all of the default settings to better suit their particular system environment TABLE 1 Interrupt select jumpers Interrupt Level Select Jumper At Position Default IQ1 IQ2 IQ3 IQ4 1 2 3 4 In IQ4 IQ5 IQ6 IQ7 4 5 6 7 Out TABLE 2 Bus Request and...

Страница 6: ... board must match the interrupt level selected on the PCI interface card Example If PCI card BG3 is selected then the BG3 jumper on VME card must be set to IN FIGURE 2 SFPCI VME set for BG3 and BR3 Interrupt Level 1234 3 2 1 0 BGOUT BRN D C D F AM CODE 1234 4567 IRQn 3 2 1 0 3 2 1 0 RBRQ BGN SF_PCI Card Ready LED 4 3 2 1 7 6 5 4 Interrupt SEL D C D F SF_VME Card ...

Страница 7: ...for connecting Bus Grand and interrupt acknowledge signals Make sure these jumpers are removed from the slot in which the VME cards will be installed FIGURE 3 SFPCI VME Enclosure with 6 Slot and 4 Slot Back plane 1 2 3 4 5 6 SLOT NUMBER Slot 4 Slot 3 Slot 2 Slot 1 Last Slot First Slot Internal SC SI conn IN O UT 1 2 3 BG 3 IA C K V M E Interface Com ponent Side ...

Страница 8: ...he PCI card as follows a Position the PCI card into the chassis b Lower the PCI card connector so that it touches its associated PCI card slot on the motherboard c Guide the PCI card back panel into the chassis backpanel d At the two upper corners of the card push the card straight downward into the slot until the card is fully seated e Using a Phillips head screwdriver replace the screw securing ...

Страница 9: ...tra AXi SPARCengine The Ultra AXi SPARCengine provides 6 PCI slots They are all 32 bits 33MHz 5V only PCI slot 1 2 3 are on internal PCI A bus segment and PCI slot 4 5 6 are on PCI B bus segment The PCI Short Card can be installed in any slot of the ULTRA AXi mother board except for slot 5 because the onboard UPA connector blocks the PCI VME 64 bit card edge PCI Bus B PCI Bus A PCI VME ...

Страница 10: ...SFPCI VME Series Installation rev 2 0 SFPCI VME SERIES User s Guide and Installation Manual 10 FIGURE 5 Ultra AXi Layout PCI bus A PCI bus B ...

Страница 11: ... PCI slots respectively for expansion PCI VME can be installed in any available PCI slot without any restriction PCI VME card will detect Ultra5 10 PCI bus and adjust automatically to support 32 bit The 64 bit portion on PCI VME card is not used VME space can be mapped to full size 2Gig because a separated second bus is used to support on board devices FIGURE 6 Install SF_PCI card to Ultra 5 ...

Страница 12: ...SFPCI VME Series Installation rev 2 0 SFPCI VME SERIES User s Guide and Installation Manual 12 FIGURE 7 Install SF_PCI Card to Ultra10 ...

Страница 13: ...Card to Ultra 30 Ultra 60 system The Ultra 30 Ultra 60 system provide 4 PCI slots You can install PCI Short Card to one of the slot 2 3 or 4 Slot 1 is dedicated for 3 3V PCI card Note that slot 2 3 and 4 share the same bus with internal storage and network devices FIGURE 8 install PCI card to Ultra30 Ultra 60 system ...

Страница 14: ...E Series Installation rev 2 0 SFPCI VME SERIES User s Guide and Installation Manual 14 FIGURE 9 Ultra 30 back side 2 2 5 Select SF_PCI slot on Ultra 450 system FIGURE 10 install SF_PCI card to Ultra 450 system ...

Страница 15: ...rted by different buses and different PCI UPA bridges Slot 7 8 9 share the same PCI bus F and slot 1 2 and 3 share the same PCI bus D This means if you have other devices already installed in slot 1 2 or 3 you should install the PCI short card to the slot 7 8 or 9 TABLE 3 450_SLOT_TABLE PCI Slot PCI UPA Bridge PCI Bus Slot Width bits Card Type bits Clock Rates MHz DC Voltage Card Type 10 1 B 32 32...

Страница 16: ...I VME The following are sample installations PCI0 SF_PCI PCI1 other such as a SCSI controller PCI2 PCI3 PCI4 PCI5 XVR 100 graphic card or PCI0 PCI1 other such as a SCSI controller PCI2 PCI3 PCI4 SF_PCI PCI5 XVR 100 graphic card TABLE 4 V250 PCI slots PCI Slot Bridge PCI Bus Slot Width bits Card Type bits Clock Rates MHz DC Voltage Card Type 5 JIO1 2b 64 32 or 64 33 and 66 3 3 V 4 JIO1 2a 64 32 or ...

Страница 17: ...SFPCI VME Series Installation rev 2 0 SFPCI VME SERIES User s Guide and Installation Manual 17 FIGURE 12 V250 PCI slots location ...

Страница 18: ...t is used to install a graphic card such as a XVR 100 this will further reduce the available PCI slots to 3 The following scheme is an example of PCI slot assignment and had been tested for SF_PCI cards PCI 0 FireWire USB card PCI1 PCI2 SF_PCI card PCI3 PCI4 XVR 100 Graphic card In fact with FireWire USB card at PCI0 and XVR 100 at PCI4 any one of the remaining PCI slots PCI1 2 3 can be installed ...

Страница 19: ...x VMEbus slots available in the Solflower VMEbus card cage SFVMEB1 Aside from the slot occupied by the SF_VME VMEbus interface board all of the other slots are available for customer owned VMEbus peripheral boards Plug in these boards and their associated cables as appropriate Since the Solflower s VMEbus card cage comes with five cover plates from the factory make sure that all of the unused VMEb...

Страница 20: ...interface board and the VMEbus interface board Make sure that the connectors are locked The cable is marked as to VME and to PCIbus and should not be resversed Note If the cable from PCI to VME is correctly connected and the power of VME box is on the green LED on PCI card is on for ready 2 5 Boot Up System After the system is powered up and rebooted Solaris will probe all installed PCI devices an...

Страница 21: ...rse chip consists of three major modules master module slave module and interrupt module 3 1 VMEbus Interface PCI Bus VME Bus VME Slave VME Master VME Interrupts VME Local Master Slave Local Local Interrupts VMEbus Slave Channel posted writes FIFO prefetch read FIFO coupled read logic posted writes FIFO Local Bus Slave Channel DMA Channel Interrupt Channel DMA bi direct FIFO Interrupt Handler Inte...

Страница 22: ...O rather than from the PCI resources directly 3 1 2 Universe as VMEbus Master The Universe becomes VMEbus master when the VME Master Interface is internally requested by the PCI Bus Slave Channel the DMA Channel or the Interrupt Channel The Interrupt Channel always has priority over the other two channels Several mechanisms are available to configure the relative priority that the PCI Bus Slave Ch...

Страница 23: ...upts are generated on the VMEbus interrupt output pins VIRQ 7 1 When a software and hardware source are assigned to the same VIRQn pin the software source always has higher priority Interrupt sources mapped to PCI bus interrupts are generated on one of the INT 7 0 pins To be fully PCI compliant all interrupt sources must be routed to a single INT pin For VMEbus interrupt outputs the Universe inter...

Страница 24: ...tions in either direction PCI to VME or VME to PCI only the relative identity of the source and destination bus changes In a DMA transfer the Universe gains control of the source bus and reads data into its DMAFIFO Following specific rules of DMAFIFO operation it then acquires the destination bus and writes data from its DMAFIFO The DMA controller can be programmed to perform multiple blocks of tr...

Страница 25: ...upled bridge As the FIFOs fill or empty depending on the direction of data movement the two buses tend to migrate to matched performance where the higher performing bus is forced to slow down to match the lower performing one This limits the sustained performance of the device Some factors such as the PCI Aligned Burst Size and VME request release modes can limit the effect of the finite FIFO size...

Страница 26: ...ined perf PABS 0 D32 BLT VME cycle time sustained perf PABS 0 sustained perf PABS 1 D64 MBLT VME cycle time sustained pefr PAB 0 sustained perf PABS 1 165 ns 22 MB s 105 ns 29 MB s 33 MB s 105 ns 39 MB s 51 MB s Register access 8 wait states TABLE 7 VME Slave Channel Performance Cycle Type Performance Coupled Read non block block 420 ns 390 ns Coupled Write non block block 420 ns 390ns Pre fetched...

Страница 27: ...rmance PCI Reads PABS 32 bytes PABS 64 bytes 51 MB s 74 MB s PCI Writes PABS 32 bytes PABS 64 bytes 53 MB s 77 MB s VME Reads non block D32 D32 BLT D64 MBLt 25 MB s 30 MB s 60 MB s VME Writes non block D32 D32 BLT D64 MBLT 25 MB s 42 MB s 72 MB s TABLE 9 Daisy Chains Daisy Chain Performance IACK Daisy Chain active Universe no active Universe interrupt 21 36 ns 6 21 ns Bus Grant Daisy Chain 32 ns T...

Страница 28: ... VME performance is degraded by cable length between two adapter cards The cable delay is shown in the preceding table This delay time must be added to the timing calculation of the total system transfer per VME cycle TABLE 10 Cable Delay Cable Delay 18 Cable 10 ns 36 Cable 20 ns 24 Cable 90 ns ...

Страница 29: ...E device mappings interrupts and DMA Direct VMEbus access through the export of VME address space device files A special programmable DMA engine that transparently provides high performance DMA transfers to and from VME address spaces when the VME device files are accessed by read 2 and write 2 operations VMEbus power off detection and management for user processes that access the PVME device file...

Страница 30: ... file of that name in the etc directory We also make a backup file of the system etc devlink tab file for safety s sake TABLE 11 PVME release components Component Description pvme The loadable PVME device driver binary file pvme conf The device configuration file to assign at which SPARC processor inter rupt level the PVME device interrupts devlink tab Specification for how to create the symbolic ...

Страница 31: ...uch memory is available for accessing VMEbus devices If other PCI devices are installed in the same PCI space the amount of PCI space available for VMEbus access is reduced However the PVME driver can in many cases work around holes in the PCI memory space caused by other devices The PVME driver accomplishes this by using up to 8 slave image windows for mapping address ranges on the VMEbus For exa...

Страница 32: ...gn some other device the space that we have allocated for the use of our slave image windows In practice this is not a problem since PCI hot plugging is not at this time supported on Sun machines smaller than the Enterprise class Because of this consideration if you have a PCI device that co habits a PCI space with the PVME device it is SAFER to install your PCI device BEFORE the PVME device If yo...

Страница 33: ...ell the Open Boot PROM via its PCI configuration base register The PCI address range to exclude is specified by a pair of numbers of the form defined as follows pci exclude address size address size where address is the physical address of the start of the excluded PCI range and size is the number of bytes to exclude starting from address Note that one can specify multiple ranges to exclude by con...

Страница 34: ...ls the number of bytes buffered for a posted write to VME space by the CPU posted writec 0 0xf The vme posted write directive controls whether to use posted writes when a VME device performs a store to the system s main memory typically an I O buffer vme posted write yes 5 6 3 3 VME Data Transfer Control The following options control the use of VME block mode for VME accesses from the UltraSPARC T...

Страница 35: ...y slave map window can consume Older Sun machines did not support a DVMA window bigger than 1 MByte This is the default The legal limit for UltraSPARC machines is 8 MBytes Syntax dvma size 0x100000 0x800000 5 6 5 VME Bus Power Off Support Starting with version 1 14 of PVME we provide some limited support for powering off the VMEbus while PVME is loaded The power fail switch in the pvme conf config...

Страница 36: ...m to load a VME device driver will fail and the message WARNING pvme0 Target VMEbus off line will be printed VME drivers that were already loaded at the time that power was shutdown can still be safely unloaded as long as their detach or fini routines do not attempt to access VME memory Generally it is a good idea to unload VME device drivers controlling a powered down VMEbus to avoid erroneous at...

Страница 37: ...MEbus device files are potentially useful when you wish to mmap 2 a chunk of VME address space and access it directly with a user program 5 7 1 VME Device Files There are 12 device files exported by the PVME driver that represent the various VME address spaces plus associated data widths These devices files are detailed in Table 9 TABLE 12 VME Address Space Device Files Device File Description dev...

Страница 38: ...ossible to change PVME control register settings with this mechanism The user is advised to exercise great caution if he desires to try this since an incorrect value inserted into one of the PVME control registers has the potential to put the PVME into a mode that could result in a system panic 5 7 3 VME Device File Example The VME device files give a user the ability to access any of the VME addr...

Страница 39: ...O_RDWR printf Mapping 0x x bytes at VME offset 0x x n bytes vme_off return mmap caddr_t 0 bytes PROT_RW MAP_SHARED fd vme_off define VME_OFFSET 0x00100000 define VME_BYTES 0x00010000 int main char vme_mem char vme_byte map VME_BYTES of VME memory at location VME_OFFSET in VME A32 space vme_mem vme_map dev pvme vme32d32 VME_OFFSET VME_BYTES Now read the first byte at the specified VME offset vme_by...

Страница 40: ...to access VME space a PCI timeout may occur that causes the system to panic with the message too many retries This problem arises because Sun initializes the PCI bus arbiter to use an insufficient number of retries when contention occurs The result it that if a VME master holds the bus for a long time when the CPU is trying to access the PCI space the PCI bus arbiter may gives up too early Before ...

Страница 41: ...e and Installation Manual 41 VME memory into a program s address space and then to access the mmaped VME memory it while a VME device is performing a DMA transfer Such simultaneous attempts to access the VMEbus should be avoided by the user as much as possible ...

Страница 42: ...d the controls of the byte lanes come from XC95xx There will be three VME A16 addresses for byte swapping module s register space one for byte swapping command one for status and one for ID register Command register sets up the byte swapping capability Status register indicates the current status of the board The content of the ID register indicates board revision An A16 address for byte swapping ...

Страница 43: ...dy There are three main commands for the byte swap functions enable byte swap byte word long word reading the current byte swap status reading the ID register for rev F 01000110 in binary Currently there are three modes of byte swapping supported byte swap word swap two bytes and long word 4 bytes swap These byte swapping modes can be set up with one command There is also one single command to ena...

Страница 44: ...Installation Manual 44 FIGURE 15 Jumper setting for address 0xEF00 FIGURE 16 Jumper setting for address 0xDF00 Jumper U44 Jumper U45 A12 A13 VCC Address EF00 4 7k Ohm 4 7k Ohm 10 Ohm 10 Ohm Jumper U44 Jumper U45 A12 A13 VCC Address DF00 4 7k Ohm 4 7k Ohm 10 Ohm 10 Ohm ...

Страница 45: ...y design to meet VME timing specs Byte swapping operation is transparent to the end user without compromising speed of any read write access Byte swapping between PCI and VME requires cautiousness as VME bus has a set of signals addressing the byte lanes These signals are DS1 DS0 A1 and LW Depending on the mode of swapping i e byte word and long word these signals will have to be regenerated on VM...

Страница 46: ... are gated through appropriate byte lanes by the control signals from XC95xx and passed on to the VME bus 0xAABB is then written to the VME memory 6 3 Byte Swapping Detail Currently rev F support three modes of byte swapping namely byte swapping for bytes byte swapping for words and byte swapping for long words The following table describes swapping detail Each swapping mode will be discussed in t...

Страница 47: ...seen from the following print out First byte 0x12 written will appear after Universe as upper byte at 0x00000000 and second byte 0x34 is written to lower byte at address 0x00000001 and so forth Linux VMIC vme_poke vme_poke a VME_A32SD A 0x00 d VME_D8 F data_b data_b 0x12 0x34 0x56 0x78 Byte write VME analyzer prinout TRIG 0 00 us 00000000 12 W UBYTE OK OK 1 1 0D 1 1 0 52 us 00000001 34 W LBYTE OK ...

Страница 48: ...me byte lanes on VME side The swapping is done by swap the two bytes of the word as shown in Figure 19 Along with data control signals such as DS1 DS0 A1 LW are regenerated by Xilinx XC95xx to appropriate values before VME devices memory Universe II D 7 0 D 15 8 D 23 16 D 31 24 D 7 0 D 23 16 D 15 8 D 31 24 Xilinx XC95xx Byte Swap Logic DS1 DS0 A1 LW VD 31 24 VD 23 16 VD 15 8 VD 7 0 VME Devices DS1...

Страница 49: ...tations with different software application interrupt vector can be masked out and byte swapping for interrupt vector could be treated differently Currently SF_VME rev F board treats the interrupt vector as in no swapping scenario regardless whether the board was set to swapping mode or non swapping mode That means when interrupt vector comes in from the VME side there will be no byte swapping for...

Страница 50: ...he available range is from 0x0000CF00 to 0x0000FF00 After setting these jumpers we can tell swp_ctl where the address is set After byte swapping function is set up user can run his her own software to talk to VME devices The following is an example of execution Commands are in bold root localhost swp_ctl Type for help Command swp_ctl disable bs ws ls all Disable swapping enable bs ws ls all Enable...

Страница 51: ...tands for revision F These are the default values of these registers Here is the possible settings of the cmd register Values Meaning 0x01FF Enable byte swap 0x02FF Enable word swap 0x04FF Enable lword swap 0x08FF Disable all swapping 0x07FF Enable all swapping swp_ctl disable bs ws ls all Disable swapping swp_ctl enable bs ws ls all Enable swapping ...

Страница 52: ...are set for IRQ1 IRQ2 IRQ3 and IRQ4 7 1 3 SYSCLK The PCI VME provides 16MHZ SYSCLK signal to the VME bus 7 1 4 Bus Timer VME bus timeout is set to 1000us and bus arbitration timeout is set to 256us 7 1 5 VME address spaces Due to the PCI space available in the Sun Ultra machines the entire A32 space cannot be mapped in to physical address space Only parts of the VME address space are available at ...

Страница 53: ...tandard supervisory block transfer 0D Extended supervisory data access 0F Extended supervisory block transfer 7 1 7 Board Size 6U VME format 233mm x 160mm 7 1 8 Power Consumption less than 5W 7 1 9 Voltage 5V DC 7 2 6 2 PCI bus information PCI VME and uses the Universe chip produced by Tundra Semiconductor as PCI controller The universe is PCI 2 1 compliant More specification about the Universe ca...

Страница 54: ...1 6 slot VME enclosures dimension 14 x 5 x 12 HxWxD 450W auto switching 110 220V AC 50 60Hz power supply 7 3 2 4 slot VME enclosure dimension 4 x 16 x 16 HxWxD 250W selectable 110 220V AC 50 60Hz power supply 7 4 Cable specifications Cable are in 18 1 5ft 36 3ft 10ft 15ft 20ft 24ft length 100 pin flat ribbon shielded cable ...

Страница 55: ...by this warranty shipping prepaid A Return of Materials Authorization number RMA should be obtained from Solflower prior to the return of any defective product Solflower s warranty is limited to the repair or replacement policy described above and neither Solflower or its agent shall be responsible for consequential or special damages related to the use of their products Any questions or requests ...

Страница 56: ...Warranty and Repair rev 2 0 SFPCI VME SERIES User s Guide and Installation Manual 56 ...

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