SMSC LAN9303M, Руководство пользователя, Страница: 10 / 11

LAN9303M Evaluation Board User Manual
Revision 1.0 (05-28-09)
USER MANUAL
SMSC LAN9303M
10
2.5.3 Port 1 Mode
Note 2.10 There are no default setting for this switch. Customers must choose the appropriate MII
mode as dictated by their application.
Note 2.11 The P1_MODE[2:0] settings are defined in Table 2.14 :
Table 2.13 Port 1 Mode Switches
SWITCH DESCRIPTION FUNCTION
S2-5 8-position DIP switch, position 5
Sets P1_MODE0 low when closed (on).
Otherwise, the signal is pulled-up internally.
( Note 2.10 , Note 2.11 )
S2-6 8-position DIP switch, position 6
Sets P1_MODE1 low when closed (on).
Otherwise, the signal is pulled-up internally.
( Note 2.10 , Note 2.11 )
S2-7 8-position DIP switch, position 7
Sets P1_MODE2 low when closed (on).
Otherwise, the signal is pulled-up internally.
( Note 2.10 , Note 2.11 )
S2-8 8-position DIP switch, position 8
Sets P1_MODE3 low when closed (on).
Otherwise, the signal is pulled-up internally.
This switch selects the duplex polarity strap
default for Port 1 as follows:
If the strap value is “0”, a “0” on P1_DUPLEX
indicates full duplex, while a “1” indicates
half-duplex.
If the strap value is “1”, a “1” on P1_DUPLEX
indicates full duplex, while a “0” indicates
half-duplex.
The default setting is open.
Table 2.14 P1_MODE[2:0] Settings
S2-7 S2-6 S2-5 PORT 1 MODE SETTINGS
0 0 0 MII MAC Mode
0 0 1 MII PHY Mode
0 1 0 MII PHY Mode / 200Mbps / 12mA clock output
0 1 1 MII PHY Mode / 200Mbps / 16mA clock output
1 0 0 RMII PHY Mode / 12mA clock output
1 0 1 RMII PHY Mode / 16mA clock output
1 1 0 RMII PHY Mode / clock is input
1 1 1 Internal PHY Mode