
LAN8700 Evaluation Board User Manual
SMSC LAN8700
USER MANUAL
Revision 1.0 (02-23-10)
7
Note 2.4
Resistor R12 acts as a pull-up on the MDIO pin. In most situations, the MAC circuitry
provides this pull-up and R12 is not required.
Note 2.5
Pins 11 and 21 of the J2 header both connect to resistor R52. This resistor must be
positioned correctly in order to divert the nINT/TX_ER/TXD4 pin of the LAN8700 to the
correct J2 location, as determined by the nINTSEL configuration strap value. Refer to
Section 2.2.3, "nINT/TX_ER/TXD4 Pin Configuration," on page 6
for additional information.
2.2.6
Switches
Table 2.6 J2 - 2x14 MII Header Pinout
HEADER
PIN
DESCRIPTION
HEADER
PIN
DESCRIPTION
1
Ground
15
TXD1
2
MDIO (
16
TXD2
3
MDC
17
TXD3
4
RXD3/nINTSEL
18
COL/MII/CRS_DV
5
RXD2/MODE2
19
CRS/PHYAD4
6
RXD1/MODE1
20
Ground
7
RXD0/MODE0
21
nINT (
)
8
RX_DV
22
+3.3V
9
RX_CLK/REGOFF
23
+3.3V
10
RX_ER/RXD4
24
Ground
11
TX_ER/TXD4 (
)
25
+5V
12
TX_CLK
26
Ground
13
TX_EN
27
+5V
14
TXD0
28
Ground
Table 2.7 Switches
SWITCH
DESCRIPTION
FUNCTION
S1
Reset switch
When pressed, triggers a board reset