EVB-USB3340 USB Transceiver Evaluation Board User Manual
SMSC USB3340 EVB
5
Revision 1.1 (12-14-10)
USER MANUAL
2.13
T&MT Pin Description
The T&MT signal names, pin number and function are described in Table 43 and Table 44 of the ULPI
Specification rev 1.1.
The USB3340 EVB fully implements a ULPI compliant interface to the T&MT connector, including
support for ULPI Clock Input Mode. This EVB supports a 1.8-3.3V ULPI I/O voltages. All signals are
described in
Table 2.3 T&MT Connector Pin Definitions
PIN
NAME
DESCRIPTION
DIRECTION
86, 36,
85, 34,
83, 33,
82, 31
DATA[7:0]
Refer to Schematic for
Connector Pin Assignment
ULPI Data Bus
IN/OUT
96
STP
ULPI STP Signal
INPUT TO
EVB
70
DIR
ULPI DIR Signal
OUTPUT
FROM EVB
71
NXT
ULPI NXT Signal
OUTPUT
FROM EVB
90
CLKOUT
ULPI Clock Signal
OUTPUT
FROM EVB
55
VBUS_FAULT_N
Driven low by the VBUS switch (U2) in the event of a
switch fault condition.
OUTPUT
15
SPKR_L
In USB Audio mode, SPKR_L is connected to the DP
pin via an analog switch in the USB3340.
IN/OUT
45
SPKR_RM
In USB Audio mode, SPKR_RM is connected to the
DP pin via an analog switch in the USB3340.
IN/OUT
17
RESET
Asserting RESET will place the USB3340 in a low
power state. Upon exiting this state (RESET=0), all
ULPI registers will contain power-on reset values.
INPUT
47
VBUS_IN
This pin is not connected
NO CONNECT
28
VBUS_OUT
+5V from the T&MT connector
INPUT TO
EVB
8,
16, 57,
69
VDD
+3.3V from the T&MT connector
INPUT TO
EVB
52
SYSTEM_CLOCK
Optional clock input to EVB. The EVB is built with the
USB3340 REFCLK provided by a crystal. See
for more information on configuring the
USB3340 EVB for ULPI Clock Input mode.
NO CONNECT
(input to EVB if
R3 is installed)
100
PSU_SHD_N
This pin is driven low indicating that +3.3V must be
sourced from the link through the T&MT connector
pins 8, 16, 57, 69 and +5.0V must be sourced from the
link through the T&MT connector pin 28.
OUTPUT
FROM EVB
49
DC_PSNT_N
This pin is driven low indicating a daughter card is
present.
OUTPUT
FROM EVB
