EVB-LAN9730-MII Evaluation Board User Manual
Revision 1.0 (10-14-11)
8
SMSC LAN9730
USER MANUAL
2.1.4
System Connections
Note 2.3
External host resets must be of the push-pull type. If the external host reset is open drain,
R7 must be removed from the PCB, or the external host reset must be wired directly to
JP1.2.
Table 2.4 System Connections
PLUG/HEADER
DESCRIPTION
PART
P1
+5 V Power Supply Barrel Connector
CUI PJ-102AH
T1
RJ45 Ethernet Port with Integrated
Magnetics & LEDs
Pulse J0011D01BNL
J1
1x2 External Reset Button Header
PIN 1:
GND
PIN 2:
Reset Generator Input
Note:
JP5 must be installed to utilize J1.
Adam Tech PH1-2-U-A
J2
1x2 External Host Reset Header
PIN 1:
nRESET
PIN 2:
GND
Note:
JP1 and JP5 must be installed to
utilize J2. (
)
Adam Tech PH1-2-U-A
J3
HSIC DATA Coaxial Connector
Hirose U.FL-R-SMT-1(01)
J4
HSIC STROBE Coaxial Connector
Hirose U.FL-R-SMT-1(01)
J5
40-pin Female MII Connector
Note:
This connector follows the
standardized MII pinout. Refer to
the EVB-LAN9730-MII schematic
for additional information.
AMP 5787170-4
J6
2x10 JTAG Header for IEEE 1149.1
Compliant TAP Controller
Note:
Refer
to for a full pin list.
Adam Tech PH2-20-U-A
J7
2x11 MII Test Point Header
Note:
Refer
to for a full pin list.
Adam Tech PH2-22-U-A
TP11
1x2 nPHY_INT Header
PIN 1:
nPHY_INT
PIN 2:
Ground
Note:
In internal PHY mode, nPHY_INT is
a configurable output. In external
PHY mode, nPHY_INT is an input.
Adam Tech PH1-2-U-A
TP13
1x2 TDO/nPHY_RST Header
PIN 1:
TDO/nPHY_RST
PIN 2:
Ground
Note:
In internal PHY mode, TDO output
is enabled. In external PHY mode,
nPHY_RST output is enabled for
use as an external PHY reset.
Adam Tech PH1-2-U-A
