Acronyms and Abbreviations
34
Zeus Ultra DMA Solid State Drives
F
FPGA
(Field Programmable Gate Array) A type of
gate array that is programmed in the field rather than
in a semiconductor fabrication facility. Containing up
to hundreds of thousands of gates, there are a
variety of FPGA architectures on the market. Some
are very sophisticated, including not only
programmable logic blocks, but programmable
interconnects and switches between the blocks. The
interconnects take up a lot of FPGA real estate,
resulting in a chip with very low gate density
compared to other technologies.
H
HDD
(Hard Disk Drive) The primary computer
storage medium, made of one or more aluminum or
glass platters, coated with a ferromagnetic material.
Most hard disks are “fixed disks,” which have platters
that reside permanently in the drive.
I
I/O
(Input/Output) Transferring data between the
CPU and a peripheral device. Every transfer is an
output from one device and an input into another.
IDE
(Integrated Drive Electronics) A type of
hardware interface widely used to connect hard
disks, CD-ROMs and tape drives to a PC. IDE was
always the more economical interface, compared to
SCSI. Starting out with 40MB capacities years ago,
20GB IDE hard disks have become entry level,
costing a fraction of a cent per megabyte.
IO
(Input/Output; see I/O)
L
LBA
(Logical Block Addressing) A method used to
support IDE hard disks larger than 504MB
(528,482,304 bytes) on PCs. LBA provides the
necessary address conversion in the BIOS to
support drives up to 8GB. BIOS after mid-1994,
which are sometimes called “Enhanced BIOS,”
generally provide LBA conversion. LBA support is
required for compatibility with the FAT32 directory.
LSB
(Least Significant Byte) “Byte” defines a
sequence of 8-bits, with the right-most bit being the
least significant and the left-most bit being the most-
significant.
LSW
(Least Significant Word) “Word” denotes
sequence of 4 bytes, or 32 bits, with the left-most
being the least significant, and the right-most being
the most significant. “Double-word” denotes
sequence of two words, or 64bits, with the left most
word being the least significant, and the right-most -
the most significant. Note, that the definition of
“word” defines a little-endian scheme, so for big-
endian platforms, or network applications, special
steps need to be taken to reorder the bytes form the
input stream.
M
MLC
(Multi-Level Cell) A flash memory technology
that stores more than one bit of data per cell.
Traditional flash memory defines a 0 or 1 bit, based
on a single voltage threshold. The patterns of two bits
(0-0, 0-1, 1-0, and 1-1) can be achieved with four
voltage levels and eight levels of voltage can yield all
the combinations in three bits.
MSB
(Most Significant) “byte” defines a sequence of
8-bits, with the right-most bit being the least
significant and the left-most bit being the most-
significant.
MSW
(Most Significant Word) “Word” denotes
sequence of 4 bytes, or 32 bits, with the left-most
being the least significant, and the right-most being
the most significant. “Double-word” denotes
sequence of two words, or 64bits, with the left most
word being the least significant, and the right-most -
the most significant. Note, that the definition of
“word” defines a little-endian scheme, so for big-
endian platforms, or network applications, special
steps need to be taken to reorder the bytes form the
input stream.
N
NAND
(Not AND) A Boolean logic operation that is
true if any single input is false. Two-input NAND
gates are often used as the sole logic element on
gate array chips, because all Boolean operations can
be created from NAND gates.
P
PIO
(Programmed Input/Output) The data transfer
mode used by IDE drives. PIO modes use the CPU’s
registers for data transfer in contrast with DMA,
which transfers directly between main memory and
the peripheral device.
