S i 5 3 4 7 - E V B
14
Rev. 1.1
Your configuration’s design report will appear in a new window, as shown below. Compare the observed output
clocks to the frequencies and formats noted in your default project’s Design Report.
Figure 19. Design Report Window
10.5.2. Verify Locked Mode Operation
Assuming you connect the correct input clocks to the EVB (as noted in the Design Report shown above), the DUT
on your EVB will be running in “locked” mode.
