26.5.6 ADCn_SCANCTRL - Scan Control Register
Offset
Bit Position
0x018
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
0
0x0
0x0
0x0
0
0
0
Access
R
W
R
W
R
W
R
W
R
W
R
W
R
W
R
W
Name
Bit
Name
Reset
Access Description
31
CMPEN
0
RW
Compare Logic Enable for Scan
Enable/disable Compare Logic
Value
Description
0
Disable Compare Logic.
1
Enable Compare Logic.
30
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in
29
PRSEN
0
RW
Scan Sequence PRS Trigger Enable
Enabled/disable PRS trigger of scan sequence.
Value
Description
0
Scan sequence is not triggered by PRS input
1
Scan sequence is triggered by PRS input selected by PRSSEL
28
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in
27:24
AT
0x0
RW
Scan Acquisition Time
Select the acquisition time for scan.
Value
Mode
Description
0
1CYCLE
1 conversion clock cycle acquisition time for scan
1
2CYCLES
2 conversion clock cycles acquisition time for scan
2
3CYCLES
3 conversion clock cycles acquisition time for scan
3
4CYCLES
4 conversion clock cycles acquisition time for scan
4
8CYCLES
8 conversion clock cycles acquisition time for scan
5
16CYCLES
16 conversion clock cycles acquisition time for scan
6
32CYCLES
32 conversion clock cycles acquisition time for scan
7
64CYCLES
64 conversion clock cycles acquisition time for scan
8
128CYCLES
128 conversion clock cycles acquisition time for scan
9
256CYCLES
256 conversion clock cycles acquisition time for scan
Reference Manual
ADC - Analog to Digital Converter
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