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Содержание Simatic S5-101U

Страница 1: ...u p t processing 3 2 Intercompatibilit y between 5 1 7 LAD CSF and STL 3 4 5 1 8 Operation i n the SINEC L1 3 7 5 2 l o c a l area network 5 2 1 5 2 2 PROGRAM START UP 5 2 3 Loading and dumping a 5 2 4 program 4 1 5 2 5 Program t e s t 4 2 6 Search function Signal status display Forcing o f outputs and flags Forcing o f timers and counters PROGRAMMING EXAMPLES Basic operations Binary l o g i c ope...

Страница 2: ...ted i n a11 three methods o f re presentation STL LAD and CSF A pro gram block can be translated from one method o f representation i n t o the two other methods with the 6701675 program mers provided certain programming rules are observed see Section 3 4 For users famil f a r with contactors and re1ays the LAD method i s recommended since the ladder diagram has very close s i m i l a r i t i e s ...

Страница 3: ...and not the actual inputs When latching and unlatching the outputs c o i l s only the process output image i s overwritten t o begin with 4 Once the user program has been pro cessed the process output image i s transferred t o the actual out puts 5 Points 2 3 and 4 are handled c y c l i c a l ly Cold restart Cr Erase process output image I Cycle checkpoint Read process input image 12nd statement I...

Страница 4: ... the process 1 0 image are erased The PC i s brought i n t o the STOP mode by switching the mode selector t o STOP selecting the PC STOP function on the programmer f a u l t s o r errors i n program scanning e g time out or operations t h a t can not be interpreted by the PC The cause f o r the P C entering the STOP state can be traced with the a i d o f the DISPLAY ESTACK function o f the program...

Страница 5: ...denti f ier set YES t I NO Operating mode o f PC p r i o r t o power up STOP RUN POWER OFF l P O W E R O N Internal re1ay equivalent Operating mode follow ing power up STOP STOP STOP RUN Current position o f mode selec t o r o f the P C on power up STOP L RUN Programning example F63 7 1 I I User I I F63 7 9 l I A f a u l t has occurred i n program scanning and the reason for t h i s i s stored i n...

Страница 6: ...ions at the point at which it was stopped Interrupt processing When an interrupt signal e g emer gency o f f from the process i s re ceived by the PC the l a t t e r i n t e r rupts c y c l i c scanning o f the user program and i n i t i t a t e s the processing o f a specific interrupt routine Interrupt processing with the S5 101U i s defined exclusively by the user pro gram so that each input an...

Страница 7: ... direct i e by passing the process image and mapped on F a IfF 0 0 and consequently I 0 0 i s l a jump i s made t o the i n t e r r u p t routine F 10 0 defines the r e t u r n address 2nd interrupt scan 10th i n t e r r u p t scan Flag byte FB3 i s transferred d i r e c t i n t o peripheral byte PB 0 i e d i r e c t t o the outputs The process output image i s updated By scanning f l a g s F 10 0...

Страница 8: ...t o STL form STEP 5 programming language Input Output The aim o f t h i s section i s t o establish a number o f rules which i f adhered to w i l l ensure complete c o m p a t i b i l i t y be tween the three methods o f representation These rules are c l a s s i f i e d as follows Rules f o r compatibility between the graphic methods o f representation LAD and CSF I f these rules are followed inp...

Страница 9: ...ary t o be exceeded 8 levels max 4 Example o f maximum LAD nesting f o r display as CSF Input as CSF and display as LAD STL Rule 1 Do not exceed the display boundaries f o r LAD Too many inputs on a CSF box cause the ladder diagram display boundary t o be exceeded CSF Fig 1 1 Example of a maximum AND box i n CSF form f o r display as an LAD ...

Страница 10: ...d an NOP 0 operation Rule 2 The inputs and outputs o f com I n the case o f timers and counters the plex elements must be programmed i n set i n p u t and t h e i n p u t f o r loading the the order i n which they are assigned time TW o r count ZW must be dis parameters on the screen i n graphic abled together mode Times and counts are exceptions since the relevant value must f i r s t be stored i...

Страница 11: ...ormation which the STEP 5 user program can access through a coordinating f l a g word i s also trans m it t e d The actual data are deposited i n a receive mailbox and a send mailbox which the user can access w i t h load and transfer operations header SF 63 0 LKF Identifier Nos 1 30 RECEIVE coordinatinq f laq b yte KME SEND coordinating f l aq byte KMS Flag byte FB 61 i s used Flag byte FB 62 i s...

Страница 12: ... Nett data Nett data SOURCE SLAVE No 0 30 2nd item o f data 4th item o f data 62nd item o f data 64th i t e m o f data LENGTH o f n e t t data 0 64 1 s t item o f data 3rd item o f data 61st item o f data For more detailed information on the SINEC L1 local area network please r e f e r t o the Instructions 4NEB 811 0545 and Programming Instructions 4NEB 811 0546 o f the SINEC L1 network D W 40 D W...

Страница 13: ...umped a l l flags Once the program has been transferred error i d e n t i f i e r s and the causes o f t o the P C memory it i s no longer i n interrupts the programner memory and must be brought back i n t o the l a t t e r before program corrections can be made output FBl PBl Dumping o f the program i n an EPROM sub module i s possible on the P G 615 w i t h adapter P G 670 with 984 adapter and ...

Страница 14: ...le f o r displaying the signal statuses o f binary and d i g i t a l operands Direct signal status display Program dependent signal status display The status o f any operands can be ob This t e s t function enables the signal served a t the cycle checkpoint Sec status o f an operand and the r e s u l t t i o n 2 1 with the aid o f t h i s function o f the logic operation t o be observed when the s...

Страница 15: ...ata word when timers and counters are started T B DW 0 t o T 15 DW 15 C 0 DW 15 t o C 16 DW 31 16 timers and 16 counters can be forced The following program i s required i n the PC LKT i s r e p laced by L D W L D 16 i LKC i s r e p laced by S C 1 L D W 16 31 D W 0 LIT i s replaced SIT Q by L D W M D 1 LKC i s rep1aced S C 1 by L D W Make sure t h a t there are meaningful time values i n the data ...

Страница 16: ...usly gr amming sequence A 0 signal appears a t output Q 1 0 ifat least one o f the inputs has a 0 signal OR logic Original lSTEP 5 representation A 1 signal appears a t output Q 1 2 There are no r e s t r i c t i o n s imposed if at least one o f the inputs has a on the number o f scans and the pro 1 signal gramming sequence I l Zl J 5 5 Q 1 2 A 0 signal appears a t output Q 1 2 when a l l inputs ...

Страница 17: ... t i t s output Statement l i s t OR before AND logic Original Ladder d iagram ai I ai 1 Control system flowchart Control system flowchart STEP 5 representation A 1 signal appears a t output Q 1 1 if input I 1 0 o r I 1 1 and one o f the inputs I 1 2 o r I 1 3 have a 1 signal Statement l i s t A 0 signal appears a t output Q 1 1 when input I 1 0 has a 0 signal and t h e AND gate has a 0 a t i t s ...

Страница 18: ...s has a 0 signal a t t h i s output Scanning for 0 signal status STEP 5 representation A 1 signal appears a t output Q 2 6 only when input I 1 5 has a 1 signal and input I 1 6 a 0 signal Control system flowchart Statement Ladder Original 11 511 6 Q 2 0 l i s t diagram STEP 5 representation Control system flowchart 11 5 a 11 6a Q 2 0 Statement l i s t A 11 5 AN11 6 Q2 g Ladder diagram 11 6 ...

Страница 19: ...eration I f the signal a t input I 1 7 changes l a s t programmed i n t h i s case A I 1 4 t o ON t h i s status i s maintained i e remains e f f e c t i v e during processing the signal i s latched of the remaining program A 1 a t input I1 6 sets t h e f l i p I f the signal a t i n p u t I 1 3 changes flop t o OM t h i s status i s maintained I f the set i n p u t I 1 6 and r e s e t Ifthe signa...

Страница 20: ... f the r e s u l t of the logic operation RLO Flag 2 0 i s reset i e i t i s only i s 1 1 during a single program pass or scan Control system flowchart Statement list Binary scaler T or trigger flip flop I I Ladder diagram Original lSTEP 5 representation A 1 l d ANF 1 6 S 0 1 0 A 11 0 A F1 0 R Q 1 0 g ANI I a A Q 1 0 S F 1 0 AN1 1 0 ANQ 1 0 Output Q 1 0 changes i t s state on a po Ifa defined freq...

Страница 21: ...alpha numeric characters 0 0 t o 999 3 0 t o 999 When loading an FB IB QB or PB the byte i s always loaded i n the low byte o f the accumulator 0 i s w r i t t e n i n t o t h e high byte o f the accumulator When transferring an FB IB QB o r PB it i s always the low byte of the accumul ator that i s transferred o f the d i g i t a l 1 0 modules bypassing Load and transfer operations are ab the PIO...

Страница 22: ...s the corresponding load and transfer operation i n the user program I n t h i s way the contents o f the memory location addressed w i t h T 10 are loaded i n t o accumul ator 1 The contents o f accumulator 1 are then transferred t o F W 20 Original T1orpoy FW20 Transfer The time T10 i n binary code i n t h i s example can be traced at FW 20 STEP 5 representation Control system flowchart t l l k ...

Страница 23: ... system flowchart The timer i s loaded w i t h the specified value 10 The number t o the r i g h t o f the p o i n t indicates the time base 0 5 0 01 S 2 5 1 s 1 2 0 1 S 3 G l O s B1 and DE are d i g i t a l outputs The time appears a t output B 1 DE i n BCD Extended pulse Original A I 2 0 L KT10 2 S ET1 N O P B N O P Q N O P Q A T 1 Q 1 0 STEP 5 representation Statement Ladder Control system The ...

Страница 24: ...n a 1 signal Outputs B1 and DE are d i g i t a l outputs when the time has elapsed and the r e s u l t The time appears at output B1 DE i n o f the logic operation i s s t i l l present BCD at the input STEP 5 representation Latching ON delay list diagram flowchart Ladder Control system The timer i s started during the f i r s t The AT or O T scans r e s u l t i n a 1 signal scanning cycle i f the...

Страница 25: ... s 1 The A T or O T scan r e s u l t s i n a l signal i f the timer i s running or i f the r e s u l t o f the l o g i c operation i s s t i l l present at the input A I 1 4 L KT1000 A T 5 0 0 4 a 0 4 Q 0 4 STEP 5 representation The timer i s loaded with the specified value 9 The number t o the r i g h t o f the point indicates the time base 0 0 01 S 2 2 1 s l 0 1 S 3 1 1 0 s Statement list Output...

Страница 26: ... 0 each time i t s time elapses i e f l a g F 2 0 has a 1 signal f o r one cycle each time the time elapses These pulses from f l a g F 2 g act on the following T f l i p f l o p with the r e s u l t that a pulse t r a i n w i t h a mark space r a t i o o f 1 1 appears a t output Q 6 6 The period dura t i o n of t h i s pulse t r a i n i s twice as great as the time o f the s e l f clocking timer ...

Страница 27: ... t a l outputs The count remains unchanged during subsequent appears at output B1 DE i n BCD processing irrespective o f whether the r e s u l t of the logic operation i s 1 or 0 The counter i s set again pulse edge evaluation at the next f i r s t scanning cycle i f the r e s u l t o f the l o g i c operation i s 1 Reset counter Original l STEP 5 representation The counter i s reset when the r e ...

Страница 28: ...n STEP 5 representation Statement Ladder Control system l i s t diagram flowchart A I 2 1 LKC 918 A C 1 Q 1 0 O r i g i n a l STEP 5 representation Statement Ladder Control system l i s t diagram flowchart 120KCfl25 A L 1 0 C D C 1 S C 1 A I 2 1 F 100 I 2 1 F 10B A C 1 The value o f the addressed counter i s A counter with two d i f f e r e n t inputs decremented by 1 The CD function i s can be us...

Страница 29: ...I B 0 I B 1 I B 0 I B 1 The operand f i r s t specified i s compared The numerical representation of the with the subsequent operand i n keeping operands i s taken i n t o account i e with the comparison function The r e s u l t the contents of the accumulators are of the comparison i s flagged by condition interpreted as being fixed point numbers codes C C 0 and CC1 Following a comparison f o r n...

Страница 30: ... Control system flowchart 1 o j IBI c 2 Q a 1 2 Statement i Iist L I B 0 L I B 1 F 81 2 Original I B 0 I B 1 I I 01 4 f o r IB 0 IB 1 IB 0 IB 1 IB 0 1 1 Ladder diagram 1B017J Q1 2 I B c2 The operand f i r s t specified i s corn The numerical representation o f the pared with the subsequent operand i n operands i s taken i n t o account i e keeping with the comparison function the contents o f the ...

Страница 31: ...IB 0 IB 1 IB 0 IB 1 IB 0 IB 1 The operand f i r s t specified i s compared The numerical representation of the with the subsequent operand i n keeping operands i s taken i n t o account i e with the comparison function The r e s u l t the contents of the accumulators are of the comparison i s flagged by condition interpreted as being fixed point numbers codes CC0 and CC1 After comparing f o r less...

Страница 32: ...nted in statement l i s t form STL L K F l27 L DR 85 F T DL 85 Explanation The constant fixed point number l27 i s loaded into accumulator 1 a t the same time the old con tents of accumulator 1 are shifted into accumulator 2 The right hand byte of data word 85 i s loaded into accumulator 1 and the f ixed point number l27 shifted into accumulator 2 The contents of accumulator 1 are subtracted from ...

Страница 33: ... l l y ANDed with those o f accumulator 2 and the r e s u l t stored i n accumulator 1 The contents o f accumulator 1 result are transferred to o u t u t word QW 0 The f i r s t b i t pattern i s loaded i n t o accumulator 1 a t the same time the old contents o f accumulator 1 are shifted i n t o accumulator 2 The second b i t pattern i s loaded i n t o accumulator 1 and the f i r s t b i t patter...

Страница 34: ...35 Cperation I Description I The parameter o f t h i s j statement specifies the number o f b i t positions by which the contents of accumulator 1 are shifted t o the l e f t SLW o r t o the r i g h t SRW Any b i t positions that become free when s h i f t i n g are padded with zeros S L W 0 t o 15 S R W 0 t o 15 S h i f t l e f t S h i f t r i g h t Example The l a s t four b i t s of the hexadec...

Страница 35: ...l If the r e s u l t o f the logic operation i s ON the jump i s not executed and the RLO i s set t o l Jump i f contents o f accumulator zero This jump i s executed i f the contents o f the accumulator are zero If the contents are n o t zero the jump i s not executed The RLO i s not changed Jump if contents o f accumulator not zero This jump i s executed i f the contents o f the accumulator are n...

Страница 36: ...ut word I W 1 i s loaded i n t o accumulator 1 Ifthe contents o f accumulator 1 are equal t o zero a jump i s executed t o label AN l otherwise the next state rnent AI 1 0 i s executed Comparison o f input word I W 1 and output word QW3 Ifthe two words are not identical individual b i t s are set i n accumulator 1 If the contents o f accumulator 1 are not zero a jump i s made back t o the AN 0 lab...

Страница 37: ...ord D W 21 the 2nd operand Condition codes the 1st oper and the 2nd operand is C C lI CC 0 Jump operations The following jump oper ations are executed codes The value of the l a s t b i t shifted out is Jump operations The following jump opera tions are Equal 1 0 I 0 IJZ Less Greater Note Comparison operations affect the r e s u l t of the logic operation If the condition i s satisfied the RLO i s...

Страница 38: ...6 Operation set Binary logic operations Up t o 6 bracketing levels an he progranmed ...

Страница 39: ... Q Timer and counter functions Function 70 70 74 70 70 D O D O 90 F0 F0 0 0 t o 2 3 3 0 t o 5 3 0 0 t o 1 3 3 0 t o 3 3 0 0t063 7 0 0 t o 2 3 3 0 t o 5 3 0 0 t o 1 3 2 0 t o 3 3 L I I S e t a n i n p u t t o l n i n the P I I S e t a n o u t p u t t o 1 i n the PIO S e t a f l a g Reset an input t o 0 i n the P I I Reset an output t o 0 i n the PIO Y Y Y Y Y 00 80 00 00 80 I I I I I I I I I I Rela...

Страница 40: ...word from the PIO Load an output byte from the PIO Load an output word from the PIO Condition Load a f l a q byte Maschine code I l ends on RLO Load a f l a q word Dep Load data left hand byte Load data right hand byte ects RLO Load data word Load a time codes affected eel IOV Load a count Load a peripheral byte o f the inputs S g v 3 VI 0 1 a Load a time BCD Load a count BCD ...

Страница 41: ...o an input byte in the PII 00 00 CC0 Word 0 Function Block end Block end conditional Block end unconditional OV Word 1 B0 48 Z7 X a 0 E U 3 4 U I E 42 46 42 B2 B1 00 B3 Dep ends on RLO N Y Y Opera tion BE BEC BEU Parameter Maschine code hexadecimal N N Aff ects RL0 Y Y Y Word 0 N N B0 65 05 65 Word 1 Condition codes affected B1 00 0 0 01 B2 C C Y Y B3 CCO Y Y O V Y Y 58 54 Fixed pointaddition Fixe...

Страница 42: ...1 09 Word 1 10 X Number n f s h i f t s Symbolic address Symbolic address Symbolic address Symbolic address Symbolic address Symbolic address SymbolicaddressOD O V B1 00 00 B2 Jump operations supplementary operations Machine code hexadecimal B3 Dep ends on RLO N 55 55 55 codes affected Word 0 hexadecimal ANDing o f accumulators 1 and 2 ORing o f accumulators 1 and 2 Exclusive ORing o f accumulator...

Страница 43: ...SIEMENS AKTIENGESELLSCHAFT Order No EWA 4NEB 810 2119 02c Printed in the Federal Republic o f Germany ...

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