Siemens SIMATIC IM 151/CPU, Руководство пользователя

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Instruction List
B-17
ET 200S Interface Module IM 151/CPU
A5E00058783-01
B.9 Logic Instructions with Timers and Counters
Querying of the signal state of the addressed timer/counter and gating of the result
with the RLO in accordance with the corresponding function.
Instru- Length Typical Execution Time in s
ction
Address ID Description
g
in
Words
Direct Addres-
sing
Indirect Ad-
dressing
*
A T
C AND timer
AND counter 1**/2 0.9
0.6 2.1+
1.8+
Timer para.
Counter p. AND timer/counter (addressed via
parameter) 2 –
– +
+
AN T
C AND NOT timer
AND NOT counter 1**/2 1.1
0.9 2.3+
2.1+
Timer para.
Counter p. AND NOT timer/counter (addres-
sed via parameter) 2 –
– +
+
Status word for: A, AN BR A1 A0 OV OS OR STA RLO /FC
Instruction depends on: – – – – – Yes – Yes Yes
Instruction controls: – – – – – Yes Yes Yes 1
O T
C OR timer
OR counter 1**/2 0.9
0.6 2.1+
1.8+
Timer para.
Counter p. OR timer/counter (addressed via
parameter) 2 –
– +
+
ON T
C OR NOT timer
OR NOT counter 1**/2 1.1
0.9 2.3+
2.1+
Timer para.
Counter p. OR NOT timer/counter (addressed
via parameter) 2 –
– +
+
X T
C EXCLUSIVE OR timer
EXCLUSIVE OR counter 2 0.9
0.6 2.1+
1.8+
Timer para.
Counter p. EXCLUSIVE OR timer/counter
(addressed via parameter) 2 –
– +
+
XN T
C EXCLUSIVE OR NOT timer
EXCLUSIVE OR NOT counter 2 1.1
0.9 2.3+
2.1+
Timer para.
Counter p. EXCLUSIVE OR NOT timer/coun-
ter (addressed via parameter) 2 –
– +
+
Status word for: O, ON, X, XN BR A1 A0 OV OS OR STA RLO /FC
Instruction depends on: – – – – – – – Yes Yes
Instruction controls: – – – – – 0 Yes Yes 1
* + time for loading the address of the instruction
** With direct instruction addressing