3
Block diagram
29
XI
N
30
XO
U
T
31
E
28
RE
S
E
T
69
(5V
)
VC
C
32
(0V)
VSS
73
27
(
0
V
)
CNV
S
S
72
(0V
)
AV
SS
70
(5V)
AVC
C
71
VR
E
F
26
BYT
E
61
62
6
3
64
65
66
67
68
74
75
76
77
78
79
80
1
2
34
567
89
10
11
12
13
14
1
5
16
17
18
19
20
21
22
23
24
25
37
38
39
40
41
42
43
44
45
4
6
47
48
49
50
51
52
33
34
35
36
53
54
55
56
57
58
59
60
RO
M
16K
b
y
te
RA
M
51
2K
by
te
Tim
e
r TA
4
(
1
6
)
Tim
e
r TA
3
(
1
6
)
Tim
e
r TA
2
(
1
6
)
Tim
e
r TA
1
(
1
6
)
Tim
e
r TA
0
(
1
6
)
Ti
m
e
r T
B
2
(
1
6
)
Ti
m
e
r T
B
1
(
1
6
)
Ti
m
e
r T
B
0
(
1
6
)
P
8
(
8
)
P
7 (
8
)
P
6 (
8
)
P
5
(8
)
UA
RT
1
(
9
)
UA
RT
0
(
9
)
P
4
(8
)
P
3
(8
)
P
2
(8
)
P
1
(8
)
P
0
(
8
)
Data buffer D BH (8)
Data buffer D BL (8)
Command cue buffer Q0 (8)
Command cue buffer Q1 (8)
Command cue buffer Q2 (8)
Incrementor (24)
Program address register PA (24)
Data address register DA (24)
Incrementor/decrementor (24)
Program counter PC (16)
Program bank register PG (8)
Data bank register DT (8)
Input buffer register IB (16)
Processor status register PS (11)
Direct page register DPR (16)
Stack pointer S (16)
Index register Y (16)
Index register X (16)
Accumulator B (16)
Accumulator A (16)
Arithmetic logic unit (16)
C
loc
k
gen
er
at
ing c
ir
c
ui
t
Data bus (Even)
Data bus (Odd)
Address bus
C
loc
k
i
nput
C
loc
k
output
E
n
abl
e output
R
e
s
e
t
in
put
R
e
fer
e
n
c
e
v
o
lt
a
ge i
nput
B
u
s
w
idth s
e
le
c
t i
npu
t
C
o
mma
nd
r
e
g
ist
e
r (
8
)
Mon
it
o
r t
im
e
r
A
-D
co
nv
er
to
r
I/O
por
t P
8
I/
O
por
t
P
7
I/O
por
t
P
6
I/
O
po
rt
P
5
I/
O
por
t
P
4
I/
O
por
t
P
3
I/O
por
t P
2
I/
O
p
o
rt
P
1
I/O
por
t P
0
12 – 3