R-24ST/R-2B34 - 20
Pin No.
Signal
I/O
Description
27
R81
IN
Signal coming from tact switch.
When either of tact switches SW1-SW4 is touched, a corresponding signal out of
R60, R61, R62 and R63 will be input into R81. When no key is touched, the signal
is held at "H" level.
28
INT1
IN
Signal coming from encoder.
Signal similar to R73. Pulse signals are input into INT1.
29
R83
OUT
Terminal not used.
30-32
R90-R92
OUT
Terminal not used.
33
XIN
IN
Internal clock oscillation frequency setting input.
The internal clock frequency is set by inserting the capacitor and resistor circuit with
respect to XOUT terminal.
34
XOUT
OUT
Internal clock oscillation frequency control output.
Output to control oscillation input of XIN.
35
RESET
IN
Auto clear terminal.
Signal is input to reset the LSI to the initial state when power is supplied.
Temporarily set "L" level the moment power is supplied, at this time the LSI is reset.
Thereafter set at "H" level.
36
HOLD
IN/OUT
Connected to VDD.
37
VLC
IN
Signal synchronized with commercial power source frequency
.
Signal similar to VSS.
38
COM1
OUT
Common data signal: COM1.
Connected to LCD (Pin No. 1)
39
COM2
OUT
Common data signal: COM2.
Connected to LCD (Pin No. 2)
40
COM3
OUT
Common data signal: COM1.
Connected to LCD (Pin No. 3)
41
COM4
OUT
Terminal not used.
42
VDD
IN
Power source voltage input terminal.
Connected to VC.
DESCRIPTION OF LSI
LSI(IXA086DRZZ)
The I/O signal
of the LS
I(IXA086DRZZ) are detailed in the following table.