– 48 –
HT-CN400DVH/HT-CN400DVE/HT-CN500DVH/HT-CN500DVE
IC106 92LRCI6028-001: Microcomputer (ES6028) (1/5)
1
VEE
Input
I/O power supply.
2-7
LA4-LA9
Output
Device address output.
8
VSS
Input
Ground.
9
VCC
Input
Core power supply.
10-16
LA10-LA16
Output
Device address output.
17
VSS
Input
Ground.
18
VEE
Input
I/O power supply.
19-22*,23* LA17-LA21
Output
Device address output.
24
RESET#
Input
Reset input, active low.
25
TDMDX
Output
TDM transmit data.
RSEL
Input
ROM Select.
26
VSS
Input
Ground.
27
VEE
Input
I/O power supply.
28
TDMDR
Input
TDM receive data.
29
TDMCLK
Input
TDM clock input.
30
TDMFS
Input
TDM frame sync.
31*
TDMTSC#
Output
TDM output enable.
32
TWS
Output
Audio transmit frame sync.
SEL_PLL2
Input
System and DSCK output clock frequency selection is made at the rising edge of RESET#.
The matrix below lists the available clock frequencies and their respective PLL bit settings.
33
TSD0
Output
Audio transmit serial data port 0.
SEL_PLL0
Input
Refer to the description and matrix for SEL_PLL2 pin 32.
34
VSS
Input
Ground.
35
VCC
Input
Core power supply.
36
TSD1
Output
Audio transmit serial data port 1.
SEL_PLL1
Input
Refer to the description and matrix for SEL_PLL2 pin 32.
37
TSD2
Output
Audio transmit serial data output 2.
38*
TSD3
Output
Audio transmit serial data output 3
39
MCLK
Input/Output
Audio master clock for audio DAC.
40
TBCK
Output
Audio transmit bit clock.
41
SPDIF
Output
S/PDIF output.
SEL_PLL3
Input
Clock source select.
42*
N.C.
No connect pins. Leave open.
43
VSS
Input
Ground.
44
VCC
Input
Core power supply.
45*
RSD
Input
Audio receive serial data.
46*
RWS
Input
Audio receive frame sync.
47*
RBCK
Input
Audio receive bit clock.
48*
N.C.
No connect pins. Leave open.
49
XIN
Input
Crystal input.
50
XOUT
Output
Crystal output.
51
AVEE
Input
Analog power for PLL.
52
VSS
Input
Ground.
53
DMA0
Output
DRAM address bus 0.
54
DMA1
Output
DRAM address bus 1.
55
DMA2
Output
DRAM address bus 2.
56
DMA3
Output
DRAM address bus 3.
57
DMA4
Output
DRAM address bus 4.
58
DMA5
Output
DRAM address bus 5.
59
VEE
Input
I/O power supply.
60
VSS
Input
Ground.
61
DMA6
Output
DRAM address bus 6.
62
DMA7
Output
DRAM address bus 7.
Port Name
Pin No.
Input/Output
Function
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
