DV-550U
12-7-2. Mode change table
Inputs
Output Q
G
LE
D
H
X
X
Z
L
H
L
L
L
H
H
H
L
L
X
Q
0
H : High level
L : Low level
X : Immaterial
Z : High impedance
Q
0
: Level of Q before the indicated steady input conditions
were established.
12-7. IC503 IX1479GE
GATE ARRAY
12-7-1. Block Diagram
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
2G
2Q8
2Q7
GND
2Q6
2Q5
2Q4
2Q3
2Q2
2Q1
1Q8
1Q7
1Q6
1Q5
1Q4
1Q3
1Q2
1Q1
1G
GND
GND
GND
Vcc
Vcc
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25 2LE
2D8
2D7
GND
2D6
2D5
2D4
2D3
2D2
2D1
1D8
1D7
1D6
1D5
1D4
1D3
1D2
1D1
1LE
GND
GND
GND
Vcc
Vcc
G
Q
D
G
Q
D
G
Q
D
G
Q
D
G
Q
D
G
Q
D
G
Q
D
G
Q
D
G
Q
D
G
Q
D
G
Q
D
G
Q
D
G
Q
D
G
Q
D
G
Q
D
G
Q
D
12-11
12-6-1. Block Diagram
ID
Register
CSR
ESRs
DQ
8-15
DQ
0-7
OUTPUT MULTIPLEXER
Program Erase
Voltage Switch
BYTE#
CUI
WSM
16-KBYTE
Block 31
16-KBYTE
Block 30
16-KBYTE
Block 1
16-KBYTE
Block 0
CE#
OE#
WE#
RP#
RY/BY#
V
PP
V
CC
GND
Y GATING/SENSING
X-DECODER
Y-DECODER
Input
Buffer
ADDRESS
QUEUE
LATCHES
ADDRESS
COUNTER
A
-1.0~17
Output
Buffer
Output
Buffer
Input
Buffer
Input
Buffer
I/O Logic
DATA
QUEUE
REGISTER
Register
Data
Comparator
Содержание DV-550U
Страница 5: ...DV 550U 4 1 For details on the use of each control 4 PART NAMES 14 Remote Sensor ...
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Страница 57: ...A B C D E F G H I J K L 1 2 3 4 5 6 7 8 9 DV 550U D 16 3 16 2 MAIN 2 CIRCUIT SCHEMATIC DIAGRAM ...
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