Sharp Aquos LC 45GD5U, Руководство по обслуживанию

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LC-45GD5U
MAJOR IC INFOMATIONS
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IC3800 (MM1630CQ)
Video switch controlled by I2C BUS to select 4 color difference signals (component signals), 5 S-video signals
and 8 composite signals.
The analog video signal input from each input terminal and the tuner is sent to this IC and selected. The video
output signal output from here is input into the video decoder (IC400) with a built-in Y/C separation via the low-
pass filter (IC402), and the component video signal is input into the A/D converter (IC3700) via the low-pass
filter (IC3702).
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IC3805 (NJM2750M)
4-input/1-output stereo audio selector, composed of a switch operation amplifier and controlled by 2-input digital
signals. The audio signal input from each input terminal is sent to this IC and selected. The audio output signal
output from here is fed to the digital amplifier (IC2502) via IC2501 (SOUND PROCESSOR).
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IC402 (SM5313AS)
5-channel video buffer with a built-in LPF (Low-Pass Filter). It switches S-terminal/composite/component
signals, and activates the 6 dB amplifier to send signals to each terminal.
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IC400 (UPD64011B)
LSI whose chip incorporates 3-dimensional Y/C separation and color decoding functions. The built-in 3-channel
10-bit (Y/composite) ADC performs 10-bit image processing for analog inputs. After Y/C separation,
chrominance demodulation and various image quality adjustments are performed. Then the output interface
outputs parallel digital signals or ITU-R656 digital signals.
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IC401 (IXA452WJ)
16 MB (2-bank, 524288-word, 16-bit) synchronous DRAM, a frame delay memory (NTSC) for 3-dimensional Y/C
separation and color decoding of IC400 (UPD6401B).
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IC3702 (SM5302AS)
3-channel video buffer with a built-in 5th order LPF (Low-Pass Filter). Linear control is available for the LPF's
cutoff frequency of 4.8 MHz to 43 MHz. The LPF can be used for analog inputs and outputs of video signal
devices supporting 480i to 1080i.
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IC3700 (AD9981)
3-channel, 10-bit, 110 MSPS A/D converter with a built-in amplifier and a PLL.
After controlling the level of component video signals and analog RGB input signals, A/D conversion is
performed using the clock generated by PLL to output signals at CMOS level.
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IC800 (IXA835WJ)
F.P.G.A. (Field Programable Gate Arrays) for synchronous processing and signal selector of each digitized
input signal.
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IC3300 (IXB348WJ)
Performs data conversion such as I/P conversion and scaling for video signal processing to fit the digitized
video image according to the output resolution. An output digital signal is sent to IC3201 (LVDS
TRANSMITTER).
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IC3401/3403 (IXB375WJ)
1 M x 32 bit x 4 banks Graphic Double Data Rate Synchronous DRAM, a memory for image processing and
buffering OSD data.