Sharp AQUOS LC-37AD5E, Руководство по обслуживанию

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LC-37AD5E
5 – 18
2.9. IC4201/IC4202 (RH-iXB742WJZZQ)
2.9.1 Block Diagram
2.9.2 Pin Connections and short description
Pin No. Pin Name I/O Pin Function
38 CLK I Active on the positive going edge to sample all inputs.
19 CS I Disables or enables device operation by masking or enabling all inputs except CLK, CKE and
DQM.
37 CKE I Masks system clock to freeze operation from the next clock cycle.
CKE should be enabled at least one cycle prior to new command.
Disable input buffers for power down in standby.
23 A0 I Row/column addresses are multiplexed on the same pins.
Row address: RA0-RA11,
Column address: CA0-CA7
24 A1 I
25 A2 I
26 A3 I
29 A4 I
30 A5 I
31 A6 I
32 A7 I
33 A8 I
34 A9 I
22 A10 I
35 A11 I
20, 21 BA0, BA1 I Selects bank to be activated during row address latch time.
Selects bank for read/write during column address latch time.
18 RAS I Latches row addresses on the positive going edge of the CLK with RAS low.
Enables row access & precharge.