74
LC-26GA5E
LC-32GA5E
LC-32GD9E
LC-37GD9E
VCT 69xyP
ADVANCE INFORMATION
Volume 1: General Description
1-64
November 3, 2004; 6251-644-1-1
AI
Micronas
207
656CLKO
OUT
LV
Digital 656 Clock Output
208
656O7
P4_7
TCLKFW
IN/OUT
LV
Digital 656 Bit 7 Output
Port 4, Bit 7 Input/Output
JTAG Interface Clock Input (firmw. Controler)
1)
only in RGB output version
2)
only in LVDS output version
VCTP Pin No.
Pin Name
Type
Connection
Short Description
PLQFP
208-1
(If not used)
2.2.1. Pin Connections and Short Description
(Continued)
VCT 69xyP
ADVANCE INFORMATION
Volume 1: General Description
1-68
November 3, 2004; 6251-644-1-1
AI
Micronas
Table 3–10:
Maximum Number of Ports
Display
CRT
FPD
Application
Analog RGB + H + V
TTL (Single RGB),
LVDS (Dual or Single)
TTL (Dual RGB)
Panel
control
X
X
X
X
X
X
X
X
X
X
X
X
656IN
X
X
X
X
X
X
X
X
X
X
X
X
656OUT
X
X
X
X
X
X
X
X
X
X
OSD444
X
X
X
X
X
X
X
X
OSD222
X
X
X
X
Port 1
4
4
4
4
4
4
4
4
8
8
8
8
8
8
8
8
8
8
8
8
Port 2
8
8
8
8
8
8
8
8
6
6
6
6
6
6
6
6
6
6
6
6
Port 3
6
8
8
6
8
8
6
6
8
6
8
8
8
8
Port 4
2
2
2
2
8
8
8
8
8
8
8
8
8
8
Max Number
of Ports
14
20
22
22
20
26
28
28
14
20
20
22
22
28
30
30
14
22
22
30
Note: 24bit RGB input is always available
Maximum Number of Ports
