Sharp AQUOS LC-26GA5H, Руководство по обслуживанию

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LC-26GA5H/M/X
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IC502 (CXD2096Q)
The CXD2096Q is also a digital chroma decoder. The main signal is processed for the luminance signal,
chroma signal and sync signal with respect to the adaptive 2D comb filter PAL/NTSC/SECAM system. The
output is 10-bit Y/CbCr (ITU_R601).
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IC601 (VPC3230D)
The VPC32320D is a digital video decoder. The sub signal is processed for the luminance signal, chroma
signal and sync signal with respect to the adaptive 4D comb filter PAL/NTSC/SECAM system. The output is 8-
bit Y/CbCr (ITU_R656).
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IC802 (IXA835WJ)
The F.P.G.A. (Field Programmable Gate Arrays) chip is designed to get the digitized input signals synchronized
and selected accordingly.
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IC3300 (IXA091WJ)
This IC is intended to convert the data of video signal, such as I/P conversion and scaling, to adjust the
digitized video signals to the output resolution. The output digital signal flows toward IC3201 (LVDS transmitter).
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IC3201 (THC63LVD823)
The THC63LVD823 is a 170-MHz LVDS (Low Voltage Differential Signaling) transmitter with 24-bit interface
chip selector. This LSI is designed to serialize the RGB, HD, VD, blanking, and pixel clock signals for
transmission.
The LVDS (Low Voltage Differential Signaling) system helps convey via cable the high-speed digital signal in
the form of differential small-amplitude signal.
The 1LINK consists of 5 pairs of differential signals. The TA, TB, TC and TD pairs are used for data transmission,
whereas the TCLK pair for pixel clock transmission. In this way, the TA, TB, TC and TD pairs are sent in 7 data
(28 data in total) by a single pixel clock.
The RGB signal (24 bits) and the sync signals (HD, VD, DE), which come into this chip, are arranged in these
28 data.
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IC4601 (IXB001WJ)
The input 8-bit RGB signal comes from the dual-linked LVDS chip and the output 8-bit RGB signal goes to the
CMOS chip. The sync signals (H, V, DE), in sync with the input signal, become free-run sync signals (H, V,
DE).