Sharp 28JS-74SS, Руководство по обслуживанию

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54
28JS-74S
Notes
1. See also Fig.5 for the typical DC-to-DC transfer of V
i
to V
oc
.
2. The ratio of the change in supply voltage to the change in input voltage when there is no change in output voltage.
t
r(oc)
cathode output rise time
10% output to 90% output
(pins 7, 8 and 9) V
oc
= 50 to 150 V square wave;
f < 1 MHz; t
f
= 40 ns
(pins 1, 2 and 3); see Fig.6
35 50 65 ns
t
f(oc)
cathode output fall time
90% output to 10% output
(pins 7, 8 and 9) V
oc
= 150 to 50 V square wave;
f < 1 MHz; t
r
= 40 ns
(pins 1, 2 and 3); see Fig.7
35 50 65 ns
t
st
settling time 50% input to
99% < output < 101%
(pins 7, 8 and 9) V
oc
= 100 V (p-p) square wave;
f < 1 MHz; t
r
= t
f
= 40 ns
(pins 1, 2 and 3); see Figs 6 and 7
− −
350 ns
SR slew rate between
50 V to (V
DD
−
50 V)
(pins 7, 8 and 9)
V
i
= 4 V (p-p) square wave;
f < 1 MHz; t
r
= t
f
= 40 ns
(pins 1, 2 and 3)
−
1850
−
V/
µ
s
V
oc(overshoot)
cathode output voltage
overshoot (pins 7, 8 and 9) V
oc
= 100 V (p-p) square wave;
f < 1 MHz; t
r
= t
f
= 40 ns
(pins 1, 2 and 3); see Figs 6 and 7
−
10
−
%
PSRR power supply rejection ratio f < 50 kHz; note 2
−
65
−
dB
α
ct(DC)
DC crosstalk between
channels
− −
50
−
dB
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
TDA6109JF (IC1801)
Characteristics