
10
No.
Item Name
IC
Register
Range
Default
F55
PSW
MTS
PSW
0/1
0
F56
FAO-VOL
MTS
VOL
0~63
60
F57
CP
PLL
CHARGE PUMP
0/1
0
F58
CC LEVEL
MICON
CC LEVEL
0/1
0
F59
OSD POS
MICON
OSD POS
0/1
0
F60
OFFSET-ADJ-COL
1 Chips
COLOR
-32~+32
0
F61
OFFSET-ADJ-TINT
1 Chips
TINT
-32~+32
0
F62
OFFSET-ADJ-TINT-YUV
1 Chips
BASEBAND-TINT
-32~+32
0
F63
WAIT MD TIMER
1 Chips
SLOW MODE
0/1
1
F64
R-CUT-YUV
1 Chips
R-CUT(OFFSET)
-63~+63
0
F65
G-CUT-YUV
1 Chips
G-CUT(OFFSET)
-63~+63
0
F66
B-CUT-YUV
1 Chips
B-CUT(OFFSET)
-63~+63
0
F67
R-DRI-YUV
1 Chips
R-DRI(OFFSET)
-63~+63
0
F68
B-DRI-YUV
1 Chips
B-DRI(OFFSET)
-63~+63
0
F69
CONTRAST OFFSET
1 Chips
CONTRAST(OFFSET)
-63~+63
0
F70
BRIGHTNESS OFFSET
1 Chips
BRIGHT(OFFSET)
-63~+63
0
F71
AV2 BRIGHTNESS OFFSET
1 Chips
BRIGHT(OFFSET)
-15~+15
7
Setting Mode Items (Continued)
20F550
Содержание 20F550
Страница 15: ...15 6 5 4 3 2 1 A B C D E F G H CHASSIS LAYOUT 20F550 ...
Страница 16: ...16 6 5 4 3 2 1 A B C D E F G H CRT BLOCK DIAGRAM 20F550 ...
Страница 17: ...17 A B C D E F G H I J 1 2 3 4 5 6 7 8 9 10 MAIN BLOCK DIAGRAM 20F550 ...
Страница 18: ...18 10 11 12 13 14 15 16 17 18 19 20F550 ...
Страница 19: ...19 A B C D E F G H I J 1 2 3 4 5 6 7 8 9 10 MTS BLOCK DIAGRAM 20F550 ...
Страница 20: ...20 WAVEFORMS 20F550 ...
Страница 22: ...22 6 5 4 3 2 1 A B C D E F G H SCHEMATIC DIAGRAM CRT Unit 20F550 ...
Страница 23: ...23 A B C D E F G H I J 1 2 3 4 5 6 7 8 9 10 SCHEMATIC DIAGRAM MAIN Unit 20F550 ...
Страница 24: ...24 10 11 12 13 14 15 16 17 18 19 20F550 ...
Страница 25: ...25 6 5 4 3 2 1 A B C D E F G H SCHEMATIC DIAGRAM MTS Unit 20F550 ...
Страница 26: ...26 6 5 4 3 2 1 A B C D E F G H PWB B CRT Unit Wiring Side PRINTED WIRING BOARD ASSEMBLIES 20F550 ...
Страница 27: ...27 6 5 4 3 2 1 A B C D E F G H PWB A MAIN Unit Wiring Side 20F550 ...