SBC-C41-pITX
SBC-C41-pITX User Manual - Rev. First Edition: 1.0 - Last Edition: 1.1 - Author: A.R./S.B. - Reviewed by M.B. Copyright © 2021 SECO S.p.A.
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3.3.8
M.2 2230 Socket 1 Key E Connectivity Slot
It is possible to increase the connectivity of the SBC-C41 board by using M.2 Socket 1 Key
E connectivity slot.
The connector used for the M.2 Connectivity slot is CN15,
which is a standard 75 pin M.2 Key E connector, type
LOTES p/n APCI0076-P001A, H=4.2mm, with the pinout
shown in the table on the left.
On the SBC-C41 board there is also a Threaded Spacer
which allows the placement of M.2 Socket 1 Key E
connectivity modules in 2230 size.
Signal Description
/ USB_P3-: USB Port #3 differential pair; it is managed by
xHCI
controller
.
P/PCIe0_Tx-: PCI Express lane #0, Transmitting Output Differential pair
P/PCIe0_Rx-: PCI Express lane #0, Receiving Input Differential pair
PC/ PCIe0_CLK-: PCI Express Reference Clock for lane #0, Differential Pair
PCIe_WAKE#: Board
’
s Wake Input, it must be externally driven by the module inserted in
the slot when it requires waking up the system.
M.2 Connectivity Slot (Socket 1 Key E type 2230) - CN15
Pin Signal
Pin Signal
1
GND
2
+3.3V_ALW
3
4
+3.3V_ALW
5
USB_P3-
6
---
7
GND
8
---
9
---
10
---
11
---
12
---
13
---
14
---
15
---
16
---
17
---
18
GND
19
---
20
---
21
---
22
---
23
---
32
---
33
GND
34
---
35
P
36
---
37
PCIe0_Tx-
38
---
39
GND
40
---
41
P
42
---
43
PCIe0_Rx-
44
---
45
GND
46
---
47
PC
48
---
49
PCIe0_CLK-
50
SUS_CLK
51
GND
52
PLT_RST#
53
CLK_REQ0#
54
KEYE_W_DISABLE2#
55
PCIe_WAKE#
56
KEYE_W_DISABLE1#
57
GND
58
---
59
---
60
---
61
---
62
---
63
GND
64
---
65
---
66
---
67
---
68
---
69
GND
70
---
71
---
72
+3.3V_ALW
73
---
74
+3.3V_ALW
75
GND