SBC-C31
SBC-C31 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.0 - Author: A.R. - Reviewed by D.T. - Copyright © 2021 SECO S.p.A.
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3.3.4
LVDS connector
SBC-C31 can be interfaced to LCD displays using its LVDS interface, which allows
connecting 18 or 24 bit, single or dual channel displays. This interface is
implemented using a DSI to LVDS bridge (TI SN65DSI84), which allow the
implementation of a Dual Channel LVDS, with a maximum supported resolution of
1920x1200 @ 60Hx (dual channel mode). Such an interface is derived from
Processor
’
s MIPI-DSI Interface.
For the connection, a connector type HR A1014WA-S-2x25P or equivalent (2 x
25p, male, straight, P1, low profile, polarised) is provided.
Mating connector: HR A1014H-2X25P with HR A1014-T female crimp terminals.
Alternative mating connector, MOLEX 501189-5010 with crimp terminals series 501334.
On the same connector are also implemented the signals for direct driving of display
’
s backlight: voltages
(LVDS_LCD_PWR and LVDS_BKLT_PWR) and control signals (LCD enable signal, PVCC_EN, Backlight
enable signal, LVDS_BKLT_EN, and Backlight Brightness Control signal with pulse width modulation and
analog control, LVDS_BKLT_PWM, BKLT_AN_CTRL).
There are also the signals necessary for driving I2C touchscreens (I2C signals, reset and interrupt request
signals).
When building a cable for connection of LVDS displays, please take care of twist as tight as possible differential
pairs
’
signal wires, in order to reduce EMI interferences. Shielded cables are also recommended.
Here following the signals related to LVDS management:
LVD/ LVDS_0_TX0-: LVDS Channel #0 differential data pair #0.
LVD/ LVDS_0_TX1-: LVDS Channel #0 differential data pair #1.
LVD/ LVDS_0_TX2-: LVDS Channel #0 differential data pair #2.
LVD/ LVDS_0_TX3-: LVDS Channel #0 differential data pair #3.
LVD/LVDS_0_CLK-: LVDS Channel #0 differential Clock.
LVD/ LVDS_1_TX0-: LVDS Channel #1 differential data pair #0.
LVD/ LVDS_1_TX1-: LVDS Channel #1 differential data pair #1.
LVD/ LVDS_1_TX2-: LVDS Channel #1 differential data pair #2.
LVDS connector CN40
Pin
Signal
Pin
Signal
1
LVDS_LCD_PWR
2
LVDS_BKLT_PWR
3
LVDS_LCD_PWR
4
LVDS_BKLT_PWR
5
LVDS_LCD_PWR
6
LVDS_BKLT_PWR
7
+3.3V_RUN
8
GND
9
GND
10
LVD
11
LVD
12
LVDS_0_TX0-
13
LVDS_0_TX1-
14
GND
15
GND
16
LVD
17
LVD
18
LVDS_0_TX2-
19
LVDS_0_TX3-
20
GND
21
GND
22
LVD
23
LVD
24
LVDS_0_CLK-
25
LVDS_1_TX0-
26
GND
27
GND
28
LVD
29
LVD
30
LVDS_1_TX1-
31
LVDS_1_TX2-
32
GND
33
GND
34
LVD
35
LVD
36
LVDS_1_TX3-
37
LVDS_1_CLK-
38
GND
39
GND
40
GND
41
LVDS_BKLT_EN
42
LVDS_BKLT_PWM
43
BKLT_AN_CTRL
44
PVCC_EN
45
I2C_SCL
46
TOUCH_RST
47
I2C_SDA
48
TOUCH_INT#
49
I2C_SDA
50
I2C_SCL
