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SeaLevel ACB II 3061, Руководство пользователя

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RS-485 ........................................................................................ 14

 

A

PPENDIX 

D - D

IRECT 

M

EMORY 

A

CCESS

............................................... 15

 

A

PPENDIX 

E - A

SYNCHRONOUS AND 

S

YNCHRONOUS 

C

OMMUNICATIONS

16

 

A

SYNCHRONOUS 

C

OMMUNICATIONS

........................................... 16

 

S

YNCHRONOUS 

C

OMMUNICATIONS

.............................................. 18

 

A

PPENDIX 

F - S

ILK

-S

CREEN

.................................................................... 20

 

A

PPENDIX 

G - C

OMPLIANCE 

N

OTICES

.................................................... 21

 

F

EDERAL 

C

OMMUNICATIONS 

C

OMMISSION 

S

TATEMENT

.............. 21

 

EMC D

IRECTIVE 

S

TATEMENT

...................................................... 21

 

W

ARRANTY

............................................

E

RROR

! B

OOKMARK NOT DEFINED

.

 

 

Figures

 

 

Figure 1 - DIP-Switch Illustration ........................................................... 2 
Figure 2 - Header E1 & E9, IRQ Selection (Shown in Factory Default)3 

Figure 3 - Header E3 DMA Selection

....................................................... 4 

Figure 4 - Header E7 DMA Enable (Factory Default) ........................... 4 
Figure 5 - Header E4 (Shown in Factory Default).................................. 5 
Figure 6 - Asynchronous Communications Bit Diagram ..................... 17 
Figure 7 - Synchronous Communications Bit Diagram ....................... 18 

 
© Sealevel Systems, Inc. 
SL9081 Revision 7/2006 
Sealevel Systems, Incorporated.  All rights reserved. 
 

Содержание ACB II 3061

Страница 1: ...ACB II USER S MANUAL Part Number 3061 Sealevel Systems Inc Phone 864 843 4343 P O Box 830 Fax 864 843 3067 Liberty SC 29657 USA www sealevel com...

Страница 2: ...ER E4 5 Input Pins 5 Output Pins 5 INSTALLATION 6 SYSTEM INSTALLATION 6 TECHNICAL DESCRIPTION 7 FEATURES 7 PROGRAMABLE BAUD RATE GENERATOR 7 CONNECTOR PIN ASSIGNMENTS 8 RS 422 8 RS 232 8 SPECIFICATION...

Страница 3: ...STATEMENT 21 WARRANTY ERROR BOOKMARK NOT DEFINED Figures Figure 1 DIP Switch Illustration 2 Figure 2 Header E1 E9 IRQ Selection Shown in Factory Default 3 Figure 3 Header E3 DMA Selection 4 Figure 4...

Страница 4: ...ped with the following items If any of these items are missing or damaged contact the supplier 1 ACB II Advanced Communications Board Sealevel Software RS 232 Interface Chips 1488 1489 Factory Default...

Страница 5: ...itch is closed the board will be non functional Leaving all eight switches open will disable the port 1 2 3 4 5 6 7 8 ON OFF 378 37F HEX COM2 2F8 2FF HEX 278 27F HEX COM1 3F8 3FF HEX 3B8 3BF HEX 338 3...

Страница 6: ...85 compatibility Header E2 selects whether the RS 485 driver is enabled by the SCC signal Request To Send RTS or always enabled With the jumper installed RTS enables the driver RS 485 Removing the jum...

Страница 7: ...d E3 Figure 3 Header E3 DMA Selection DMA Enable Header E7 Header E7 selects whether the DMA Tri State drivers are enabled disabled or whether the RTS from Channel B is used to enable the DMA The A po...

Страница 8: ...in as an input to the DB 25 connector RD Selects RDB pin as an input to the SCC Output Pins Choose only one of the following pin 20 RS 232 pins 20 21 RS 422 TC Selects the TXC pin as an output to the...

Страница 9: ...r straps for each port which must be set for proper operation 1 Turn off PC power Disconnect the power cord 2 Remove the PC case cover 3 Locate an available slot and remove the blank metal slot cover...

Страница 10: ...lectable port address Selectable IRQ Level 3 4 5 Selectable DMA Channel 1or 3 RS 232 or RS 422 485 interface Supports TD RD RTS CTS TXC RXC Signals Jumper options for clock source Software programmabl...

Страница 11: ...Output TXC Transmit Clock Positive 20 Output TXC Transmit Clock Negative 21 Output DTR Data Terminal Ready Positive 20 Output DTR Data Terminal Ready Negative 21 Output RS 232 Signal Name Pin Mode GND...

Страница 12: ...Q L and 100 Functional Testing All Sealevel Systems Printed Circuit Boards are built to U L 94V0 rating and are 100 electrically tested Printed Circuit Boards are solder mask over bare copper or sold...

Страница 13: ...ly installed adapters No two adapters can occupy the same I O address 3 Make sure the Sealevel Systems adapter is using a unique IRQ While the Sealevel Systems adapter does allow the sharing of IRQ s...

Страница 14: ...rome adapter is installed 3F8 3FF is typically reserved for COM1 2F8 2FF is typically reserved for COM2 238 23F may conflict with a Bus Mouse 7 Please refer to your included diskette for any post prod...

Страница 15: ...on on its web site Please refer to this to answer many common questions This section can be found at http www sealevel com faq htm 4 Sealevel Systems maintains a Home page on the Internet Our home pag...

Страница 16: ...s denotes a binary 1 mark The RS 232 and the EIA TIA 574 specification defines two type of interface circuits Data Terminal Equipment DTE and Data Circuit Terminating Equipment DCE The Sealevel System...

Страница 17: ...ate driver not dual state will allow the electrical presence of the driver to be removed from the line The driver is in a tri state or high impedance condition when this occurs Only one driver may be...

Страница 18: ...ddress and control information When an interface needs to use DMA it activates a DMA request signal DRQ to the DMA controller which in turn sends a DMA hold request to the Microprocessor When the Micr...

Страница 19: ...ach bit in the data stream is also an important difference between synchronous and asynchronous communications The remainder of this section is devoted to detailing the differences between character f...

Страница 20: ...rruption Common methods are called E ven Parity or O dd Parity Sometimes parity is not used to detect errors on the data stream This is referred to as N o parity Because each bit in asynchronous commu...

Страница 21: ...ermined and sometimes multiple clock signals are available For example if two nodes want to establish synchronous communications point A could supply a clock to point B that would define all bit bound...

Страница 22: ...eceiving a clock from point B and sampling the receive data pin on every upward clock transition Once point A receives the pre defined bit pattern sync flag the next eight bits are assembled into a va...

Страница 23: ...Appendix F Silk Screen Sealevel Systems ACB II Page 20 Appendix F Silk Screen 4 2 4 9 3 9...

Страница 24: ...ch case the user will be required to correct the interference at his own expense EMC Directive Statement Products bearing the CE Label fulfill the requirements of the EMC directive 89 336 EEC and of t...

Страница 25: ...his product Sealevel Systems will not be liable for any claim made by any other related party RETURN AUTHORIZATION MUST BE OBTAINED FROM SEALEVEL SYSTEMS BEFORE RETURNED MERCHANDISE WILL BE ACCEPTED A...

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