Schweitzer Engineering Laboratories SEL-387E, Инструкция по эксплуатации

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4-20 Control Logic Date Code 20020129
SEL-387E Instruction Manual
TRIP4. OUT101 to OUT103 go directly to the three breaker trip coils, and OUT104 goes to the
86 operate coil. These connections are shown in Figure 2.19 in Section 2: Installation .
Four unlatch variables, ULTR1 to ULTR4, correspond to the four trip variables in the Trip Logic
setting area. ULTR1 to ULTR4 define the conditions to unlatch the seal-in of trip logic that
takes place when TRn goes to logical 1. They sense when it is appropriate to de-energize the trip
circuit. In this case the instantaneous overcurrent elements 50Pn3 were set very low, and unlatch
is defined as when the phase currents in all three phases drop below the setting. This is done
with the NOT operator. That is, ULTR1 = !50P13, ULTR2 = !50P23, and ULTR3 = !50P33.
ULTR4 = !(50P13 + 50P23 + 50P33) and unlatches TRIP4 when all phase currents on all
windings drop below the 0.5 A setting.
TDURD, or minimum trip duration time, is an additional miscellaneous timer setting for trip
logic. TDURD defines the minimum length of time the trip signal will be issued, regardless of
other inputs to the trip logic. The default setting is 9 cycles.
Close Logic
There are three specific sets of close logic within the SEL-387E Relay. They are designed to
operate when SEL
OGIC
control equation close variable setting CLm is asserted (m = 1, 2, 3) and
to unlatch when SEL
OGIC
control equation setting ULCLm is asserted. The output of the logic is
Relay Word bit CLSm. The logic operates much like the Latch Bit function in SEL
OGIC
control
equation Sets 1 through 3, with additional characteristics. In the close logic the reset or unlatch
function has priority over the set or latch function.
Figure 4.8 shows the logic diagram for the CLS1 logic. The remaining logic for CLS2 through
CLS3 is identical, using variables CL2 through CL3 and ULCL2 through ULCL3, respectively.
Figure 4.8: SEL-387E Relay Close Logic (CLS1)
The logic begins with the assertion of SEL
OGIC
control equation CL1, one of the Group
variables. In our example application CL1 = CC1 + /IN104. Thus, CL1 will assert either if (1) a
CLO 1 command has been sent to the relay via a serial port, or if (2) input IN104 has been
energized via an external SCADA, recloser or control switch contact, for example. CL1 does not
directly assert CLS1 but acts as one input to the AND gate at the center. The other input to the
AND gate is a negated OR gate output which asserts whenever any of the unlatching functions is
in effect. Thus, unlatch elements take precedence over the close command elements.