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G.8
SEL-351A Relay
Instruction Manual
Date Code 20080213
Setting SEL
OGIC
Control Equations
SEL
OGIC
Control Equations
When frequency goes above the corresponding pickup level 81D1P, Relay
Word bit 81D1T deasserts and an event report is generated (if the relay is not
already generating a report that encompasses the new transition). This allows
a recovery from an underfrequency condition to be observed. See
and
.
demonstrates the action of the falling-edge
operator \ on the underfrequency element in setting ER.
Figure G.2
Result of Falling-Edge Operator on a Deasserting
Underfrequency Element
SEL
OGIC
Control
Equation Operation
Example—Tripping
If tripping does not involve Direct Transfer Trip (DTT) or switch-onto-fault
trip logic, the SEL
OGIC
control equation trip setting TR is the only trip setting
needed. Refer to
.
TR
=
51PT + 51GT + 50P1 * SH0
(fuse saving example)
TRSOTF
=
0
(not used—set directly to logical 0)
ULTR
=
!(51P + 51G)
(discussed in preceding subsection)
Analysis of SEL
OGIC
Control Equation Trip Setting TR
Again, the example trip equation is:
TR =
51PT + 51GT + 50P1 * SH0
The Relay Word bit definitions are:
In the trip equation, the AND operator * is executed before the OR operators
+,
50P1 * SH0
Element 50P1 can only cause a trip if the reclosing relay shot counter is at shot
= 0. When the reclosing relay shot counter is at shot = 0 (see
), Relay
Word bit SH0 is in the following state:
SH0 =
1
(logical 1)
If maximum phase current is
above
the phase instantaneous overcurrent
element pickup setting 50P1P (see
), Relay Word bit 50P1 is in the
following state:
50P1 =
1
(logical 1)
With SH0 = 1 and 50P1 = 1, the ANDed combination results in:
50P1 * SH0
=
1 * 1
= 1 (logical 1)
One Processing Interval
\81D1T
81D1T
One Processing Interval
Relay Word
Bit
Description
51PT
phase time-overcurrent element timed out
51GT
residual-ground time-overcurrent element timed out
50P1
phase instantaneous overcurrent element asserted
SH0
reclosing relay shot counter at shot = 0
Содержание SEL-351A
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